Structure and manufacturing method of packaged base plate

Abstract

The invention relates to a structure and a manufacturing method of a packaged base plate. The packaged base plate comprises a base plate body, a welding preventing layer and metal projections, wherein the base plate body is provided with a circuit layer on the surface, the circuit layer is provided with a plurality of electrically connected pads of which the planes are prolate so as to improve the flexibility of circuit distribution space; the welding preventing layer covers the base plate body and is provided with a plurality of open pores corresponding to the electrically connected pads, wherein the plane shapes of the open pores of the welding preventing layer are prolate; and the metal projections are matched with the open pores in the welding preventing layer and correspond to the electrically connected pads. When used for manufacturing the packaged base plate of a multilayer plate, the invention can reduce the layers of a circuit layer increasing structure of the multilayer plate because the distributed circuits can be increased in the space between two adjacent electrically connected pads, thereby lowering the manufacturing cost.

Description

technical field [0001] The present invention relates to a package substrate structure and its manufacturing method, in particular to a package substrate structure and its manufacturing method which can increase the number of circuits between adjacent electrical connection pads or reduce the pitch of bumps. Background technique [0002] At present, in most semiconductor packaging structures, the back surface of the semiconductor chip is pasted on the surface of the substrate body on the side where the chip is placed, and then wire bonding is performed, or the active surface of the semiconductor chip is bonded to the substrate by flip-chip bonding (Flip chip). The crystal side surface of the body is electrically connected, and then solder balls are planted on the ball side surface of the substrate body to electrically connect to external electronic devices such as printed circuit boards. [0003] Figure 1A to Figure 1D It is a schematic cross-sectional view of the manufacturi...

AI Technical Summary

Problems solved by technology

[0007] The above drawings illustrate that in the prior art, under a certain pad pitch, due to the limitation of the size of the electrical connection pads 12a, only one circuit 12b can be arranged in the space between adjacent electrical connection pads 12a

Moreover, limited by the engraving technology’s capacity for circular openings, the size of the solder mask openings 13a is limited to a certain extent, which also limits the feasibility of further reducing the distance between the metal bumps 15.

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