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Firmware ISP writer and writing method for SPI bus interface

A technology of SPI bus and programming method, which is applied to instruments, electrical digital data processing, program control devices, etc., can solve problems such as low product efficiency, and achieve the effects of improved work efficiency, simple structure, and safety assurance.

Inactive Publication Date: 2010-06-23
CHENGDU SUPERXON COMM TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The firmware ISP writer of the existing SPI bus interface is usually single-channel, and can only initiate a firmware download to one SPI bus target slave device at the same time, which is very inefficient in the mass production process of the product

Method used

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  • Firmware ISP writer and writing method for SPI bus interface
  • Firmware ISP writer and writing method for SPI bus interface

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Embodiment Construction

[0026] The technical solutions of the present invention will be further described below in conjunction with the accompanying drawings and through specific implementation methods.

[0027] The main idea of ​​the technical solution of the present invention is based on a rule about FLASH or EEPROM memory chips supporting the multiplexing SPI bus interface of the in-system programming (ISP) function, because four signals (MOSI, MISO, SCK, CS) is unidirectional transmission, so the four-wire SPI bus signal pins (MOSI, MISO, SCK, CS) of a single microprocessor can be fanned out to multiple memory chips on the panel-board in parallel. Four-wire SPI bus signal (MOSI, MISO, SCK, CS), when the microprocessor initiates a firmware download operation for a single chip, the firmware of these multiple chips connected in parallel is actually downloaded, which is simultaneous download. The SPI bus target slave device that it can support, that is, the maximum number of memory chips, is determin...

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PUM

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Abstract

The invention discloses a firmware ISP writer and a writing method for an SPI bus interface. A microcomputer is connected with a microprocessor through an external interface. The microprocessor is connected with no less than one SPI bus target slave device through a multiplex SPI bus target slave device interface. The microcomputer is used to convert firmware data into SPI commands and data streams required by the SPI bus target slave device and to release the SPI commands and the data streams to the microprocessor. The microprocessor is used as a master SPI device to separately or simultaneously download the data streams into the no less than one SPI bus target slave device, and is used to read back from one designated SPI bus target slave device for verification. By adopting the technical scheme, the invention has the advantages that the working mode of simultaneous downloading and timeshare verification is realized, the cost is reduced and the efficiency is improved.

Description

technical field [0001] The invention relates to the technical field of electronic engineering, in particular to a firmware ISP programmer and a programming method of an SPI bus interface. Background technique [0002] The serial peripheral interface (Serial Peripheral Interface, SPI) bus technology is a synchronous serial interface introduced by Motorola, and most microcontrollers (MCU) are equipped with SPI hard core and hardware interface. SPI is used for full-duplex, synchronous serial communication between microcontrollers and various peripheral devices. SPI can send and receive serial data simultaneously. It only needs four lines to complete the communication between MCU and various peripheral devices. These four lines are: serial clock line (SCK), master input / slave output data line (MISO), master output / slave input data line (MOSI), active low slave select line (CS). [0003] At present, most of the FLASH or EEPROM memory chips based on the Serial Peripheral Interf...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/38G06F9/445
Inventor 周健刘海姜先刚
Owner CHENGDU SUPERXON COMM TECH CO LTD
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