Dual-interface radar data recorder
A radar data and recorder technology, applied in the field of dual-interface radar data recorders, can solve the problems of high price and long development cycle, and achieve the effects of flexible and convenient use, fast recording speed and small size
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Publication Date
- 2010-09-22
- Estimated Expiration
- Not applicable · inactive patent
Smart Images
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Abstract
Description
(1) Technical field:
[0001] The invention relates to a dual-interface radar data recorder. It belongs to the technical field of communication control. (two) background technology:
[0002] With the development of ultra-wideband radar technology and software radio, the waveform of radar signals is becoming more and more complex. Only by analyzing and researching the echoes of radar targets in actual situations can the correctness and accuracy of the entire radar signal processing system be guaranteed. stability. Radar echoes will generate a huge amount of data after being processed by the RF front-end and receiving intermediate frequency. In order to preserve the data completely, the recording equipment must be able to track and record the signal in each radar echo pulse continuously and for a long time. Data processing and analysis after the test. Therefore, the data recording equipment plays a very important role in the development and experiment process of the radar see...
Examples
Embodiment Construction
[0042] A kind of dual-interface radar data recorder of the present invention, it is by DSP master control module (select ADI company high-end processor TS201S for selection), FPGA interface control module (select Xilinx company XC4VSX55 for selection), ADC data acquisition module (select ADI company's AD9430 for use), SDRAM data buffer unit (select MT48LC4M32B2 of Micron Company), network interface chip (select DM9000A supplied by DAVICOM), solid-state IDE hard disk and power supply chip. Among them, the SDRAM data cache unit is connected with the DSP main control module for data cache; the DSP main control module and the ADC data acquisition module are connected with the FPGA interface control module through the bus for data exchange; the FPGA interface control module controls the solid-state IDE hard disk and The network interface chip completes data recording; the power supply chip is responsible for providing the voltage required for the entire system to work. The block ...