MOS (Metal-oxide Semiconductor) transistor and making method thereof

Abstract

The invention relates to an MOS (Metal-oxide Semiconductor) transistor and a making method thereof. The MOS transistor comprises a silicon substrate, an oxide layer arranged on the silicon substrate, top silicon arranged on the oxide layer, a first gate through hole, a second gate through hole, a gate dielectric, a gate, a source / drain electrode extension region and a source / drain electrode, wherein the top silicon consists of a first p-type single crystal silicon layer, a first n-type single crystal silicon layer, a second p-type single crystal silicon layer and a second n-type single crystal silicon layer, the first gate through hole is arranged in the center of the first p-type single crystal silicon layer, a second gate through hole is arranged in the center of the second p-type single crystal silicon layer, the gate dielectric and gate are arranged on the inner wall of the first gate through hole, the inner wall of the second gate through hole and the second n-type single crystal silicon layer, the source / drain electrode extension region is arranged in a source / drain electrode region at both sides of the gate, the source / drain electrode is arranged in the source / drain electrode region at the both sides of the gate, and corners of the first n-type single crystal silicon layer and the second n-type single crystal silicon layer are smooth. The invention enhances the utilization ratio of the area of a chip and solves the corner effect caused by strong corner current.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a MOS transistor and a manufacturing method thereof. Background technique [0002] As the semiconductor industry develops towards smaller and faster devices, the feature lateral dimensions and depths of semiconductor devices are gradually reduced, requiring source / drain and source / drain extension regions (Source / DrainExtension) to become shallower accordingly. The process level requires that the depth of the source / drain junction of the semiconductor device is less than 1000 angstroms, and may eventually require the junction depth to be on the order of 200 angstroms or less. Currently, the source / drain junction is almost always formed by doping by ion implantation. As the size of electronic components shrinks, how to manufacture the source and drain of metal-oxide-semiconductor (MOS) transistors with nanometer process technology is the development direction of ion implant...

AI Technical Summary

Problems solved by technology

[0006] The structure of the MOS transistor formed by the existing technology is single, and the design is not flexible enough; and as the integration of semiconductor devices becomes higher and higher, the room for its volume to become smaller becomes smaller and smaller, which cannot meet the needs of process development

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