Calibration system and calibration method for dual-Faraday cup measuring ratios of ion implantation machine

Abstract

The invention discloses a system and a method for calibrating dual-Faraday cup measuring ratios of an ion beam implantation machine. The calibration system comprises a movable Faraday cup, a dose sampling Faraday cup, a closed-loop control Faraday cup, a dose detector, a digital control scanning generator, a motor motion controller and a control computer, wherein the connection relation among all components is shown as the summary figure. The calibration method comprises the following steps of: 1, starting an ion beam for scanning along the horizontal direction uniformly, moving the movable Faraday cup to the central position of a silicon wafer, and performing dose sampling on a scanning ion beam to solve an implantation dose value at the central position, wherein a formula is shown as the figure; 2, sampling the implantation dose of the scanning ion beam by using the closed-loop control Faraday cup to calculate an implantation dose value at the position, wherein a formula is shown as the figure; and 3, calculating the dose detection ratios of two Faraday cups, wherein a formula is shown as the figure. In the system and the method, the detection of the two Faraday cups on the implantation dose is unified to the same standard to ensure the detection accuracy of the ion implantation dose.

Description

technical field [0001] The invention relates to a double Faraday cup measurement and correction system and correction method on an ion implanter, in particular to an ion implanter and belongs to the field of semiconductor device manufacturing. Background technique [0002] Ion beam implanter is one of the most critical doping equipment in the manufacture of semiconductor devices. As the integration of semiconductor device manufacturing develops towards the system-on-chip scale, the wafer used for device manufacturing expands toward a size of more than 300mm, while the size of unit devices shrinks toward micro-nano thin lines, especially the size of on-chip transistors and field effect transistors. The shrinkage of ion beam implantation poses obvious challenges to the ion beam implantation doping technology. When the manufacturing of semiconductor integrated circuit devices moves towards the 65nm technology node, the unit field effect transistor needs to generate an ultra-sh...

AI Technical Summary

Problems solved by technology

As the integration of semiconductor device manufacturing develops towards the system-on-chip scale, the wafer used for device manufacturing expands toward a size of more than 300mm, while the size of unit devices shrinks toward micro-nano thin lines, especially the size of on-chip transistors and field effect transistors. The shrinkage of the ion beam implantation doping technology poses obvious challenges

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