Method for implementing base region window of silicon germanium heterojunction transistor

Abstract

The invention discloses a method for implementing a base region window of a silicon germanium heterojunction transistor, which comprises the following steps of: depositing a composite dielectric film on a silicon chip with an embedded layer, a collector region and a substrate isolation region on a silicon substrate; performing dry etching on the composite dielectric film, defining the base regionwindow, and etching an oxide film stopped on the composite dielectric film; after the base region window is opened and before the oxide film of the composite dielectric film is removed, depositing a dielectric film layer, and forming a D-shaped side wall at the interface step of the base region window by using the dielectric film layer; and meanwhile, performing wet removal on the residual oxide film in the base region window by using the protection of the D-shaped side wall, and epitaxially growing an SiGe base region. The interface step of the base region window is changed slowly because ofthe formation of the D-shaped side wall, and the slowly changed step formed by the D-shaped side wall is continuously reserved after SiGe extension and has no insulator residue in the subsequent emitter polycrystalline silicon side wall process, so that continuous metal silicide is formed, the resistance of an outer base region is reduced, and the performance of the device is improved.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuits, in particular to a method for realizing a base region window of a silicon-germanium heterojunction transistor. Background technique [0002] In the manufacturing process of SiGe (silicon germanium) heterojunction transistor (SiGe HBT), the formation of SiGe base region is realized by means of epitaxy, including selective epitaxy, non-selective epitaxy and compound epitaxy. [0003] The current conventional non-selective epitaxial base formation method is (combined with figure 1 shown): 1. Dielectric film 105 deposition. The dielectric film 105 is an oxide film, or a combination of an oxide film and other film qualities. 2. The SiGe base window opens. 3. SiGe epitaxial growth, forming the SiGe base monocrystalline silicon layer 110 and the SiGe outer base region 106, growing monocrystalline silicon in the monocrystalline silicon region, and growing polycrystalline silicon in oth...

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Problems solved by technology

When the process steps of the sidewall 109 are implemented, the insulating sidewall 111 will also be formed on the step at the window interface of the base region, so that the formation of the metal silicide is discontinuous here, resulting in an increase in the resistance of the outer base region and affecting device performance.

Removing the insulating spacer 111 at the step by over-etching is a potential risk. To avoid the influence of the thermal budget on device performance after SiGe is formed, the film used for the insulating spacer 111 is usually an oxide film formed by plasma. , excessive etching will lead to insufficient thickness of the sidewall between the emitter and the base, which is not enough to achieve insulation

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