Power semiconductor device and method of manufacturing the same

Abstract

The present invention provides a method of manufacturing a power semiconductor device capable of forming a RESURF structure by burying an insulating film in a semiconductor substrate without causing a variation of the thickness of the insulating film and damage to the substrate, and also to provide a power semiconductor device manufactured by the manufacturing method. The method of manufacturing the power semiconductor device according to the present invention includes the steps of: (a) forming a silicon nitride film on a semiconductor substrate; (b) after the step (a), forming a ring-shaped trench along a peripheral portion of the semiconductor substrate 6; (c) forming a first silicon oxide film on an inner surface of the trench; (d) after the step (c), forming a second silicon oxide film on an entire surface of the semiconductor substrate to bury the trench; (e) planarizing the second silicon oxide film by using the silicon nitride film as a stopper; and (f) forming a third silicon oxide film in a region in which the silicon nitride film is removed.

Description

technical field [0001] The present invention relates to diodes that perform rectification using a PN junction formed on a semiconductor substrate, or MOS field effect transistors (MOSFETs) that control the main current by applying a voltage to a gate formed on a semiconductor substrate through an insulating film A method of manufacturing a power semiconductor device such as an insulated gate bipolar transistor (IGBT) and its structure. Background technique [0002] A power semiconductor device is composed of a cell region through which current flows and a terminal region formed around the cell region in order to maintain a breakdown voltage. As the end region structure, for example, a RESURF (Reduced Surface Field: Reduced Surface Field) structure is used. In the RESURF structure, when a reverse voltage is applied, the depletion layer is extended by the RESURF layer, thereby maintaining a withstand voltage. In this case, a thick insulating film is required on the surface o...

AI Technical Summary

Problems solved by technology

For example, in the case of using a silicon oxide film as an insulating film, before exposing the substrate, the planarization process by CMP is stopped, and when the silicon oxide film on the substrate remains on the entire surface of the wafer, it is possible to prevent excessive Damage to the substrate caused by overpolishing, however, the thickness of the silicon oxide film varies greatly within the wafer plane or within the chip

When color unevenness occurs on the surface of the substrate due to variations in the thickness of the silicon oxide film, it is not possible to check for abnormalities using the appearance

Furthermore, in the post-process, that is, the process of forming electrodes in the cell region, it is necessary to remove the silicon oxide film in the cell region by wet / dry etching, but there is a problem that the controllability of the etching amount decreases due to the variation in the thickness of the silicon oxide film.

[0005]On the other hand, CMP is used to planarize until the substrate surface is exposed. When the silicon oxide film on the substrate surface is completely removed on the entire wafer surface, the liner The deviation of the thickness of the silicon oxide film on the bottom, however, causes damage to the substrate due to excessive grinding

When substrate damage occurs, it will lead to deterioration of electrical characteristics such as current leakage from the substrate surface to the back surface

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