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Semiconductor device with partially sealed shell and manufacturing method of semiconductor device

A manufacturing method and a technology of a sealed shell, which are applied in the direction of manufacturing microstructure devices, piezoelectric devices/electrostrictive devices, piezoelectric/electrostrictive/magnetostrictive devices, etc., can solve the problem of wafer thickness corrosion processing technology Stability, damage, difficult to achieve precise processing and other issues, to achieve the effect of stable and reliable processing technology, flexible process requirements, and high precision

Active Publication Date: 2014-08-06
ADVANCED SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, this method has strict requirements on the manufacturing process. It not only requires double-sided alignment and etching, but also needs to accurately control the accuracy of double-sided etching, and the stability requirements of the subsequent deep etching process are also very strict; The non-uniformity of the circle thickness and the instability of the corrosion processing process are objective existences, and precise processing is difficult to achieve. In order to ensure that the window can be opened, it is necessary to use a long processing time. Obviously there will be a lot of damage
In addition, the cost is also higher

Method used

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  • Semiconductor device with partially sealed shell and manufacturing method of semiconductor device
  • Semiconductor device with partially sealed shell and manufacturing method of semiconductor device
  • Semiconductor device with partially sealed shell and manufacturing method of semiconductor device

Examples

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no. 1 example

[0052] Figure 2 to Figure 10 It is a schematic cross-sectional structure diagram of the manufacturing process of a semiconductor device with a partially sealed casing according to an embodiment of the present invention. The manufacturing process will be described in detail below in conjunction with the accompanying drawings. It should be noted that these and other subsequent drawings are only examples, which are not drawn according to the same scale, and should not be taken as limitations on the protection scope of the actual claims of the present invention.

[0053] like figure 2 As shown, a cover substrate 001 is provided for application as a cover plate of a subsequent semiconductor device. The material of the covering base 001 can be all applicable materials including semiconductor material, insulating material or metal material.

[0054] like image 3 As shown, front side dimples 002, 003 are formed on the front side of the cover substrate 001. It should be pointed...

no. 3 example

[0073] Figure 14 to Figure 18 It is a schematic cross-sectional structure diagram of the manufacturing process of a semiconductor device with a partially sealed casing according to an embodiment of the present invention. In this embodiment, it is also necessary to use the above-mentioned first embodiment Figure 2 to Figure 6 to describe. The manufacturing process will be described in detail below in conjunction with the accompanying drawings. It should be noted that these and other subsequent drawings are only examples, which are not drawn according to the same scale, and should not be taken as limitations on the protection scope of the actual claims of the present invention.

[0074] Such as figure 2 As shown, a cover substrate 001 is provided for application as a cover plate of a subsequent semiconductor device. The material of the covering base 001 can be all applicable materials including semiconductor material, insulating material or metal material.

[0075] Such ...

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Abstract

The invention provides a manufacturing method of a semiconductor device with a partially sealed shell. The manufacturing method comprises the following steps of: providing a cover substrate and forming a front face concave pit on the front face of the cover substrate; depositing a stop material on the front face of the cover substrate so as to form an etching stop layer; etching the back face opposite to part of the front face concave pit on the cover substrate until the etching stop layer is exposed and forming a back face concave pit on the back face of the cover substrate; providing a device substrate on which the semiconductor device is formed; and butting and fixing the front faces of the cover substrate and the device substrate and forming the partially sealed shell above the device substrate. Correspondingly, the invention also provides the semiconductor device with the partially sealed shell. The manufacturing method belongs to a front face manufacturing process and is compatible with a complementary metal oxide semiconductor (CMOS). During butted covering of the device substrate, the process temperature is below 400 DEG C; and the total thickness of the device substrate is reduced remarkably after the partially sealed shell is formed.

Description

technical field [0001] The invention relates to the technical field of micro-electromechanical system manufacturing, in particular, the invention relates to a semiconductor device with a partially sealed casing and a manufacturing method thereof. Background technique [0002] In some applications in the field of micro-electromechanical systems (MEMS), semiconductor devices need to have partially sealed housings, ie a part of the semiconductor device may need to be exposed to the air. This different structure from conventional semiconductors requires a different manufacturing method from conventional semiconductor devices to manufacture such devices. For example, in MEMS sensors, it is often necessary to expose devices such as pressure sensors to the air to obtain measurement data; in biosensors, the biosensor needs to be in direct contact with the detected solution during detection. Therefore, in applications such as these, in the process of forming the housing, it is neces...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): B81C1/00B81B3/00
Inventor 张挺张艳红杨海波马清杰谢志峰邵凯
Owner ADVANCED SEMICON MFG CO LTD