SRAM (Static Random Access Memory) unit structure based on fake contact etch stop layer technology and preparation method of SRAM unit structure

A technology of through-hole etching and cell structure, applied in electrical components, semiconductor/solid-state device manufacturing, electrical solid-state devices, etc., can solve the problems of non-contribution, static noise redundancy, etc. Large static noise redundancy, the effect of improving performance

Inactive Publication Date: 2012-04-18
SHANGHAI HUALI MICROELECTRONICS CORP
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Problems solved by technology

[0008] The invention discloses a static random access memory (SRAM, Static Random Access Memory) unit structure and a preparation method based on pseudo-via etch stop layer (CESL, Contact etch stop laye

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  • SRAM (Static Random Access Memory) unit structure based on fake contact etch stop layer technology and preparation method of SRAM unit structure
  • SRAM (Static Random Access Memory) unit structure based on fake contact etch stop layer technology and preparation method of SRAM unit structure
  • SRAM (Static Random Access Memory) unit structure based on fake contact etch stop layer technology and preparation method of SRAM unit structure

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[0024] The specific embodiments of the present invention will be further described below in conjunction with the accompanying drawings:

[0025] Figure 5 It is a schematic diagram of the structure of each semiconductor device of the static random access memory cell based on the pseudo-via etch stop layer (CESL, Contact etch stop layer) technology of the present invention and the manufacturing method thereof, please refer to Figure 5 , A static random access memory cell structure based on pseudo-via etch stop layer technology and a preparation method thereof, wherein, in the production process of the static random access memory cell, the pull-down transistor (Pull Down NMOS) Covering a tensile stress film (Tensile liner), and covering the pull-up transistor (Pull Up PMOS) and a pass transistor (Passing Gate NMOS) with a compressive liner (Compressive liner), the prior art is only from the perspective of improving device performance To start, cover the tensile stress film (Tensile...

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Abstract

The invention discloses a static random access memory (SRAM) unit structure based on a fake contact etch stop layer (CESL) technology and a preparation method of the SRAM unit. In the production process of the SRAM, a tensile liner covers a pull-down transistor of the SRAM and a compressive liner covers a pull-up transistor and a channel transistor of the SRAM. According to the SRAM structure based on the fake CESL technology and the preparation method of the SRAM structure, provided by the invention, a beta value is increased by covering the tensile liner on the pull-down transistor (NMOS (N-channel Metal Oxide Semiconductor) device) and covering the compressive liner on the channel transistor (NMOS device), so that a static noise margin (SNM) is effectively increased and the aim of realizing the stability of the SRAM unit is realized.

Description

technical field [0001] The invention relates to a pseudo-via etching stop layer technology, in particular to a static random access memory (SRAM, Static Random Access Memory) unit structure and a preparation method thereof based on the pseudo-via etching stop layer technology. Background technique [0002] Static Random Access Memory (SRAM, Static Random Access Memory) is a very common embedded memory in logic circuits. Due to its high-density mode, the throughput of integrated circuits is largely limited by the performance of embedded memory. Currently, the most common SRAM cell is the 6T structure. [0003] figure 1 It is a static random access memory unit of 6T structure in the prior art, please refer to figure 1 , where PU is a pull-up transistor (Pull Up PMOS), PD is a pull-down transistor (Pull Down NMOS), and PG is a pass transistor (Passing Gate NMOS). The key indicator for considering the stability of a 6T SRAM cell is static noise redundancy Yu (SNM, Static Nois...

Claims

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Application Information

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IPC IPC(8): H01L27/11H01L21/8244
Inventor 黄晓橹谢欣云陈玉文邱慈云
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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