Method used for reducing copper interconnection structure material damage after chemical machinery polishing
A copper interconnect structure, chemical mechanical technology, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of no improvement in dielectric damage, reduce contact resistance, etc., achieve low dielectric constant, improve reliability, The effect of low contact resistance
Active Publication Date: 2014-07-23
SHANGHAI HUALI MICROELECTRONICS CORP
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Problems solved by technology
However, this invention is applied to the solder reflow process in the chip packaging process, and this invention can only repair the oxide layer on the metal surface, reduce contact resistance, and has no effect on improving the dielectric damage of low dielectric constant
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[0022] The present invention will be further described below in combination with principle diagrams and specific operation examples.
[0023] Please see figure 1 Shown, the present invention reduces the method for copper interconnect structure material damage after chemical mechanical polishing, wherein, comprises the following steps:
[0024] Choose a copper interconnect structure filled with a low-k dielectric material as the substrate, such as Figure 2a As shown, from bottom to top are low dielectric constant dielectric layer 0 , barrier layer 1 covering the junction of dielectric layer 0 and metal layer 2 , and electroplated copper metal layer 2 . Since the excess barrier layer 1 and copper metal need to be removed, the follow-up process is to perform chemical mechanical grinding, and then wash and dry. Due to the mechanical force in chemical mechanical grinding, there will be certain damage to the medium and metal on the surface, resulting in Such as Figure 2b of str...
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The invention discloses a method used for reducing copper interconnection structure material damage after chemical machinery polishing. The method comprises the following steps: selecting a copper interconnection structure filled with a low cost electric constant dielectric material as a substrate, with a low cost electric constant dielectric layer, a barrier layer and a galvanized copper metal layer arranged successively from bottom to top; removing redundant copper and the barrier layer on a surface through the chemical machinery polishing, and carrying out cleaning dryness; carrying out oxidation treatment on the interconnection structure having media damage and metal material damage, and converting a damaged structure into an oxide layer; and adopting a wet chemical removing method to remove the oxide layer converted from the damaged structure, and carrying out treatment on the residual media damaged structure or metal oxide on metal. The method provided by the invention can obtain a scatheless interconnection structure, the treated substrate can closely combine with a successive film due to the absence of a damaged defect layer, thereby being beneficial to the electromigration of the interconnection structure and prolonging the reliability service life; and the reliability of the existing process, product yield and whole chip performance can be improved.
Description
technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to the field of molding and processing of low-dielectric-constant copper interconnects, and in particular to a method for reducing damage to copper interconnect structure materials after chemical mechanical polishing. Background technique [0002] With the continuous improvement of semiconductor performance requirements, the size of integrated circuit chips is getting smaller and smaller, the consumer market has higher and higher requirements for chip speed, and the signal delay of the back-end interconnection structure has gradually become a limiting factor for chip performance improvement. The number of transistors on a single chip is increasing, and the back-end interconnection is required to become more and more complex. The number of metal wire layers and the total length continue to increase, because the resistance of the interconnection line is increasing, ...
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IPC IPC(8): H01L21/768
Inventor 张亮胡友存张守龙
Owner SHANGHAI HUALI MICROELECTRONICS CORP