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Low Voltage Differential Signal Transmitter

A low-voltage differential signal and transmitter technology, applied to the shaping network in the transmitter/receiver, baseband system components, etc., can solve the problem of increased power consumption, large quiescent current, and instability of the common-mode level of the output differential signal, etc. problem, to achieve the effect of saving area and power consumption

Active Publication Date: 2014-10-15
ALLWINNER TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] 1) The common mode feedback circuit needs to use 2 equal value resistors R a and R b to sense the transmitter output node V a and V b common-mode level of the output signal, so that at node V a and V b provides a DC path between the bias current I b Not only must flow through the receiver termination resistor R t In order to generate a differential voltage signal, an additional part of the current is consumed in R a and R b path, increasing the power consumption of the circuit
Moreover, in order to minimize signal reflection at the source end, the output resistance at the source end needs to match the characteristic impedance of the transmission line, resulting in R a and R b The current flowing is almost equal to the terminal resistance R t current flowing, greatly increasing the power dissipation
[0007] 2) In the initial time when the common-mode feedback circuit generates the output differential signal, the common-mode feedback circuit needs a certain response time to stabilize the common-mode level of the output differential signal at the expected value V cm_ref , and during this time, the common-mode level of the output differential signal is unstable
[0008] 3) The maximum data transmission rate of the current low-voltage differential signal technology has reached more than 600Mbps, and the high-speed differential output signal requires a higher bandwidth of the common-mode feedback circuit, and such a feedback circuit usually consumes a large quiescent current

Method used

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  • Low Voltage Differential Signal Transmitter

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0052] As a possible implementation mode, the specific circuit of a low-voltage differential signal transmitter in Embodiment 1, its circuit structure schematic diagram is as follows Figure 6 shown.

[0053] The low voltage differential signal transmitter includes a mirror module 1 and an output module 2 .

[0054] The mirror module 1 includes a mirror current unit 12 , an auxiliary circuit and a mirror circuit unit 11 .

[0055] NMOS transistor M 5 with resistor R 1 The mirror circuit unit 11 is configured in series.

[0056] In mirror module 1, NMOS (N-type Mental-Oxide-Semiconductor) transistor M 5 The channel width-to-length ratio is W / L; the resistance R 1 The resistance is R up .

[0057] Mirror current unit 12 is a mirror current source, and the current size of mirror current unit 12 bias is 1 ref .

[0058] Resistance R 1 one end of the M 5 connected to the source, the resistor R 1 The other end of the mirror current unit 12 is connected to the output of t...

Embodiment 2

[0100] As another possible implementation, Embodiment 2 of the present invention also proposes a second schematic diagram of a circuit structure of a low-voltage differential signal transmitter, as shown in Figure 7 shown.

[0101] The low-voltage differential signal transmitter of Embodiment 2 includes a mirror module 1 and an output module 2 .

[0102] The mirror module 1 includes a mirror current unit 12 , an auxiliary circuit unit 13 and a mirror circuit unit 11 .

[0103] PMOS transistor M 5 with resistor R 1 The mirror circuit unit 11 is configured in series.

[0104] In mirror block 1, the PMOS transistor M 5 The channel width-to-length ratio is W / L, and the resistance R 1 The resistance is R up ;

[0105] Described mirror current unit 12 is a mirror current source, and its bias current value size is 1 ref .

[0106] Resistance R 1 One end of the transistor M 5 connected to the source, the resistor R 1 The other end of the mirror current unit 12 is connecte...

Embodiment 3

[0152] As another possible implementation mode, Embodiment 3 of the present invention also proposes a third schematic diagram of a circuit structure of a low-voltage differential signal transmitter, as shown in Figure 8 shown.

[0153] The low-voltage differential signal transmitter of the third embodiment includes a mirror module 1 and an output module 2 .

[0154] The mirror module 1 includes a mirror current unit 12 , an auxiliary circuit unit 13 and a mirror circuit unit 11 .

[0155] NMOS transistor M 6 with PMOS transistor M 5 The mirror circuit unit 11 is configured in series.

[0156] In mirror block 1, the NMOS transistor M 6 The channel width to length ratio is (W / L) 1 , PMOS transistor M 5 The channel width to length ratio is (W / L) 2 .

[0157] Described mirror current unit 12 is a mirror current source, and its bias current value size is 1 ref .

[0158] Transistor M 6 The drain of the transistor is connected to the power supply voltage VCC, and the tra...

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PUM

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Abstract

The invention discloses a low voltage differential signal transmitter, which comprises a mirror image module and an output module, wherein the mirror image module is used for receiving a first reference voltage signal, outputting a first reference voltage to the output module, generating a second reference voltage signal according to the first reference voltage signal and feeding the second reference voltage signal back; and the output module is used for receiving a differential input signal and the first reference voltage from the mirror image module, controlling to generate two low voltage differential signal states by taking the differential input signal as a triggering signal, and generating a third reference voltage signal with a potential value equal to that of the second reference voltage signal as a peak potential of a single-end signal of a differential output signal by using a relation between a circuit mirror image of the mirror image module and the output module under each state of the two low voltage differential signal states. A common mode level of the differential output signal can be determined without a common mode feedback circuit; therefore, the area and the power consumption of a circuit are reduced.

Description

technical field [0001] The present invention relates to an electronic circuit technology, in particular to a low voltage differential signal (LVDS) technology, in particular to a low voltage differential signal (LVDS) transmitter. Background technique [0002] With the continuous improvement of the optical fiber transmission speed and the running speed of the central processing unit, the data speed between chips has increasingly become the bottleneck restricting the data rate of the system. Unlike chip-internal clocks, chip-to-PCB signal rates have benefited little, despite increasing chip integration. Over the past few decades, high-speed digital communications have been achieved by massively parallel transmissions at the expense of increased cost and complexity of integrated circuit packaging and printed circuit boards. In addition, reducing power consumption is also an important topic in battery-operated portable equipment or other systems where it is desirable to reduce...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L25/03
Inventor 倪陈志王洪魁丁然
Owner ALLWINNER TECH CO LTD