SONOS (Silicon Oxide Nitride Oxide Silicon) unit transistor with high erasing speed and manufacturing method thereof

Abstract

The invention discloses a method for increasing erasing speed of an SONOS (Silicon Oxide Nitride Oxide Silicon) unit transistor by using a strained silicon technology. The method is characterized by comprising the step of making a side wall of a gate on a P type substrate with a plurality of shallow trench isolation regions and also comprises the following steps of: (step 1) depositing a barrier layer to cover the transistor; (step 2) etching the barrier layer so as to remove the barrier layer covering above a NMOS (N-channel Mental-Oxide-Semiconductor) region so that the NMOS region is exposed; (step 3) carrying out carbon ion implantation on the P type substrate between the two sides of the gate and the shallow trench isolation regions; and (step 4) carrying out high temperature annealing so that tensile stresses are generated on the trenches through the silicon carbide. By using the method for increasing erasing speed of the SONOS unit transistor by using the strained silicon technology, disclosed by the invention, the energy band of the silicon is cracked and the electron effective mass is reduced along the trench direction due to the cracking result; meanwhile, the energy valley scattering probability of the electron is also reduced and the electron mobility of the SONOS unit transistor is obviously increased so that SONOS programming efficiency and speed of a hot electron injection mechanism are increased.

Description

technical field

[0001] The invention relates to a silicon-silicon oxide-silicon nitride-silicon oxide-silicon (SONOS) memory, in particular to a SONOS unit transistor with a high erasing and writing speed and a manufacturing method thereof. Background technique

[0002] The basic working principle of non-volatile semiconductor memory is to store charge in the gate dielectric of a MOSFET. Devices in which charges are stored in discrete trapping centers in a suitable dielectric layer are called charge-trapping devices. The most common of these devices is silicon-silicon oxide-nitride-silicon oxide-silicon (SONOS) memory.

[0003] The main two storage mechanisms for storing data in flash memory cells are channel hot electron (CHE) injection and F-N tunneling. Channel hot electron injection is considered to be quite reliable after long-term cycling because it does not place significant stress on the tunnel oxide. But the disadvantage of CHE is that the programming efficiency ...

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