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Method for preparing p-CdS nano wire and p-CdS/n-Si nano p-n node through manganese trioxide (MoO3) surface doping

A surface doping, nanowire technology, applied in sustainable manufacturing/processing, final product manufacturing, electrical components, etc. The effect of mass production, high electrical stability, and stable performance

Inactive Publication Date: 2012-07-11
HEFEI UNIV OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The inability to prepare p-CdS nanowires seriously limits the application and development of CdS nanowires

Method used

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  • Method for preparing p-CdS nano wire and p-CdS/n-Si nano p-n node through manganese trioxide (MoO3) surface doping
  • Method for preparing p-CdS nano wire and p-CdS/n-Si nano p-n node through manganese trioxide (MoO3) surface doping
  • Method for preparing p-CdS nano wire and p-CdS/n-Si nano p-n node through manganese trioxide (MoO3) surface doping

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0036] Weigh 1.0g of CdS powder with a purity higher than 99.9% into Al 2 o 3 In the small porcelain boat, place the small porcelain boat upstream of the dual-temperature zone tube furnace, place an Au-coated silicon wafer 10cm downstream of the carrier gas, the thickness of the Au film is 15nm, and pump the vacuum to 5×10 -3 Below Pa, feed Ar and H at a flow rate of 30 sccm 2 Gas mixture, Ar and H 2 The volume ratio of the mixed gas is 95:5, and the air pressure is maintained at 5×10 3 Pa, the upstream was heated to 850°C and kept for 90 minutes to synthesize intrinsic CdS nanowires.

[0037] Directly coat the synthesized intrinsic CdS nanowires with a layer of MoO with a thickness of 5nm by pulsed laser deposition or electron beam thermal evaporation or magnetron sputtering 3 layer.

[0038] Coating the above with MoO 3 The layered CdS nanowires are placed in a rapid annealing furnace for annealing at 150° C. for 15 minutes to obtain p-type CdS nanowires.

[0039] The...

Embodiment 2

[0041] Weigh 1.0g of CdS powder with a purity higher than 99.9% into Al 2 o 3 In the small porcelain boat, place the small porcelain boat upstream of the dual-temperature zone tube furnace, place an Au-coated silicon wafer 10cm downstream of the carrier gas, the thickness of the Au film is 15nm, and pump the vacuum to 5×10 -3 Below Pa, feed Ar and H at a flow rate of 30 sccm 2 Gas mixture, Ar and H 2 The volume ratio of the mixed gas is 95:5, and the air pressure is maintained at 5×10 3 Pa, the upstream was heated to 850°C and kept for 90 minutes to synthesize intrinsic CdS nanowires.

[0042] Use pulsed laser deposition method or electron beam thermal evaporation method or magnetron sputtering method to directly coat the synthesized intrinsic CdS nanowire with a layer of MoO with a thickness of 40nm 3 layer.

[0043] Coating the above with MoO 3 The layered CdS nanowires are placed in a rapid annealing furnace for annealing at 200° C. for 15 minutes to obtain p-type CdS...

Embodiment 3

[0046] Weigh 1.0g of CdS powder with a purity higher than 99.9% into Al 2 o 3 In the small porcelain boat, place the small porcelain boat upstream of the dual-temperature zone tube furnace, place an Au-coated silicon wafer 10cm downstream of the carrier gas, the thickness of the Au film is 15nm, and pump the vacuum to 5×10 -3 Below Pa, feed Ar and H at a flow rate of 30 sccm 2 Gas mixture, Ar and H 2 The volume ratio of the mixed gas is 95:5, and the air pressure is maintained at 5×10 3 Pa, the upstream was heated to 850°C and kept for 90 minutes to synthesize intrinsic CdS nanowires.

[0047] Directly wrap a layer of MoO with a thickness of 80nm on the synthesized intrinsic CdS nanowires by pulsed laser deposition method or electron beam thermal evaporation method or magnetron sputtering method 3 layer.

[0048] coated with MoO 3 The layered CdS nanowires are placed in a rapid annealing furnace for annealing at 200° C. for 15 minutes to obtain p-type CdS nanowires.

[...

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Abstract

The invention relates to a method for preparing p-CdS nano wire and p-CdS / n-Si nano p-n node through manganese trioxide (MoO3) surface doping, which is characterized in that: an MoO3 layer with the thickness of 5 to 150nm is wrapped on an intrinsic CdS nano wire, then the intrinsic CdS nano wire which is coated with the MoO3 layer is annealed under the temperature of 100 to 300 DEG C for 10-30 minutes to obtain a p-CdS nano wire; and the surface of a silicon dioxide layer on an n+-type silicon substrate is photoetched and corroded to obtain an n+ silicon substrate with partial area being covered by the silicon dioxide layer, and then the intrinsic CdS nano wire is dispersed on the n+ silicon substrate, so one end of the intrinsic nano wire is arranged on the silicon dioxide, the other end is arranged on the n+ silicon substrate; a mental electrode is manufactured on the silicon dioxide layer; and finally an MoO3 layer covers the n+ silicon substrate to be annealed to obtain the p-CdS / n-Si nano p-n node. The method has a simple technique, is suitable for the large-scale production, and can be used for obtaining the p-CdS nano wire with high electric conductivity and stable performance and the p-CdS / n-Si nano p-n node with high performance.

Description

technical field [0001] The invention relates to a method for preparing p-CdS nanowires and p-CdS / n-Si nanometer p-n junctions, specifically a method for preparing p-CdS nanowires and p-CdS / n-Si nanop-n junctions, specifically a 3 A method for preparing p-CdS nanowires and p-CdS / n-Si nanometer p-n junctions by doping the surface of the thin layer. Background technique [0002] Nanowire is a special structure of matter at the nanometer scale, which requires two dimensions in the nanometer scale in space. CdS nanowire is an important IIB-VIB cluster semiconductor material. Based on its forbidden band width ~ 2.42eV, it corresponds to yellow-green light in the visible light range, so it is used in nanoelectronic devices such as nano-photodetection devices, light-emitting devices, and photovoltaic devices. application is of great significance. Currently, the synthesized intrinsic CdS nanowires exhibit weak n-type, through in-situ doping, n- or n- + -CdS nanowires are also rela...

Claims

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Application Information

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IPC IPC(8): H01L31/18H01L33/00H01L33/04
CPCY02P70/50
Inventor 罗林保李方泽揭建胜李强朱志峰
Owner HEFEI UNIV OF TECH
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