High-speed phase splitting circuit with band spreading function
A frequency band expansion and functional technology, applied in the field of high-speed phase splitting circuit, can solve the problems of lossy integrator output common-mode voltage deviation, post-stage circuit DC offset, phase splitting amplifier output differential signal DC deviation, etc., to improve work Frequency, the effect of expanding the operating bandwidth
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specific Embodiment approach 1
[0039] Specific implementation mode one: the following combination figure 2 Describe this embodiment, the high-speed phase splitting circuit with frequency band extension function described in this embodiment, it includes the first PMOS transistor M1, resistor R1, resistor R2, phase splitting amplifier and integrator,
[0040] The phase splitting amplifier is composed of the first amplifier A1 and the second amplifier A2 cascaded,
[0041] The integrator is composed of a third amplifier A3, a resistor R3, a resistor R4 and a capacitor C1,
[0042] One end of the resistor R1 is connected to the power supply VDD! , the other end of the resistor R1 is simultaneously connected to the source of the first PMOS transistor M1 and the non-inverting input terminal VIP of the first amplifier A1, the gate of the first PMOS transistor M1 is used as the receiving end of the transimpedance amplifier output signal VO_TIA, and the first PMOS transistor M1 The drain is connected to one end o...
specific Embodiment approach 2
[0053] Specific implementation mode two: the following combination image 3 Describe this embodiment. This embodiment is a further description of Embodiment 1. The first amplifier A1 includes a first NMOS transistor MN1_A1, a second NMOS transistor MN2_A1, a third NMOS transistor MN3_A1, a fourth NMOS transistor MN4_A1, and a fifth NMOS transistor. MN5_A1, sixth NMOS transistor MN6_A1, resistor RB_A1, resistor RS1_A1, resistor RS2_A1 and resistor RCM_A1,
[0054] One end of the resistor RB_A1 is connected to the power supply VDD! , the other end of the resistor RB_A1 is connected to the common terminal of the gate of the sixth NMOS transistor MN6_A1 and its drain, and the source of the sixth NMOS transistor MN6_A1 is connected to GND! ;
[0055] One end of the resistor RCM_A1 is connected to the power supply VDD! , the other end of the resistor RCM_A1 is connected to the drain common end of the third NMOS transistor MN3_A1 and the fourth NMOS transistor MN4_A1;
[0056] Th...
specific Embodiment approach 3
[0066] Specific implementation mode three: the following combination Figure 4 This embodiment is described. This embodiment is a further description of Embodiment 1 or 2. The second amplifier A2 includes a seventh NMOS transistor MN1_A2, an eighth NMOS transistor MN2_A2, a ninth NMOS transistor MN3_A2, a second PMOS transistor MP1_A2, a third PMOS transistor MP2_A2, resistor RL1_A2, resistor RL2_A2, resistor RC_A2, capacitor CL1_A2 and capacitor CL2_A2,
[0067] One end of the resistor RC_A2 is connected to the power supply VDD! , the other end of the resistor RC_A2 is connected to the source common terminals of the second PMOS transistor MP1_A2 and the third PMOS transistor MP2_A2,
[0068] The capacitor CL1_A2 is connected between the source and the gate of the second PMOS transistor MP1_A2, the resistor RL1_A2 is connected between the drain and the gate of the second PMOS transistor MP1_A2,
[0069] The capacitor CL2_A2 is connected between the source and the gate of the t...
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