Design process for chip-type power diode
A technology of power diode and design process, applied in the field of chip power diode design process, can solve the problems of product stability and safety hidden danger, low junction temperature of design work, etc.
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0017] A chip power diode design process includes rated current design, rated reverse repetitive voltage design, chip size design, layout design, diffusion condition design and product evaluation. The chip diode adopts a micro-mesa GPP glass passivation process.
[0018] The rated current of the chip power diode is 0.3A, and the chip size is 32mil.
[0019] The rated reverse repetition voltage of the chip power diode is 600V.
[0020] The size of the chip active area of the above-mentioned chip power diode is 21mil. In order to form an effective protection ring, the size of the nickel-plated area on the secondary photolithography table is 18mil*18mil, and the width of the photolithography lines is selected to be 2, 3, 4, and 5mil respectively. .
[0021] Diffusion condition design: In order to ensure sufficient mesa size of the chip power diode, the etching depth should not be too deep to reduce lateral corrosion. The depth is composed of two parts: the PN junction depth a...
Embodiment 2
[0033] A chip power diode design process includes rated current design, rated reverse repetitive voltage design, chip size design, layout design, diffusion condition design and product evaluation. The chip diode adopts a micro-mesa GPP glass passivation process.
[0034] The rated current of the chip power diode is 0.5A, and the chip size is 42mil.
[0035] The rated reverse repetition voltage of the chip power diode is 800V.
[0036] Diffusion condition design: In order to ensure sufficient mesa size of the chip power diode, the etching depth should not be too deep to reduce lateral corrosion. The depth is composed of two parts: the PN junction depth and the space expansion area, where the width of the space expansion area is determined by the avalanche breakdown voltage and is a constant value. Therefore, in order to reduce the etching depth, the only way to reduce the depth of the PN junction is to reduce the boron diffusion time. Since the phosphorus junction depth is ma...
Embodiment 3
[0040] A chip power diode design process includes rated current design, rated reverse repetitive voltage design, chip size design, layout design, diffusion condition design and product evaluation. The chip diode adopts a micro-mesa GPP glass passivation process.
[0041] The rated current of the chip power diode is 0.7A, and the chip size is 45mil.
[0042] The rated reverse repetition voltage of the chip power diode is 1000V.
[0043] Diffusion condition design: In order to ensure sufficient mesa size of the chip power diode, the etching depth should not be too deep to reduce lateral corrosion. The depth is composed of two parts: the PN junction depth and the space expansion area, where the width of the space expansion area is determined by the avalanche breakdown voltage and is a constant value. Therefore, in order to reduce the etching depth, the only way to reduce the depth of the PN junction is to reduce the boron diffusion time. Since the phosphorus junction depth is m...
PUM
Abstract
Description
Claims
Application Information
- R&D Engineer
- R&D Manager
- IP Professional
- Industry Leading Data Capabilities
- Powerful AI technology
- Patent DNA Extraction
Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.
© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com