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Integrated method for graphene surface high k gate dielectric

A graphene surface and integration method technology, which is applied in the fields of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of poor heat resistance of polymer films, affecting the electrical properties of graphene, and difficult metals

Inactive Publication Date: 2013-02-27
FUDAN UNIV
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  • Abstract
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Problems solved by technology

The predecessors proposed two types of nucleation layer films, one is to spin-coat a layer of polymer film on the surface of graphene, but the polymer film not only has the problem of poor heat resistance, but also its low dielectric constant will cause The dielectric properties of the overall gate dielectric film deteriorate; the other is to deposit an ultra-thin metal film on the surface of graphene by electron beam evaporation, and then let it oxidize into a metal oxide film, and use it as a nucleation layer. However, this method also has problems such as poor wettability of the metal on the surface of graphene, which cannot form a uniform film, difficulty in completely oxidizing the metal, interaction between the metal and graphene, and even the formation of chemical bonds that may affect the electrical properties of graphene.

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  • Integrated method for graphene surface high k gate dielectric
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  • Integrated method for graphene surface high k gate dielectric

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Embodiment Construction

[0024] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0025] see Figure 1~Figure 5 . It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of ​​the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in actual implementation. Dimensional drawing, the type, quantity and proportion of each component can be changed arbitr...

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Abstract

The invention belongs to the technical field of semiconductor devices and particularly relates to an integrated method for a graphene metallic oxide gate dielectric. The method includes that by means of metal alkoxide hydrolysis principle, an impregnation process or a rotary coating process is used to generate a layer of ultrathin metal hydroxide film on the graphene surface; and the ultrathin metal hydroxide film is used as a nucleating layer, the uniform and high-quality high k gate dielectric film is prepared on the graphene surface by a conventional atomic layer deposition. According to the integrated method for the graphene surface high k gate dielectric, by means of the metal hydroxide film induced by the metal alkoxide hydrolysis, the graphene crystal structure can not be damaged in metal alkoxide hydrolysis process, simultaneously the metal hydroxide film can gradually dehydrate in the following atomic layer deposition process to form the metallic oxide film with higher dielectric constant, the performance of overall gate dielectric layer can not be reduced, and accordingly the device performance of products (for instance, a graphene field effect transistor) prepared by the graphene is improved.

Description

technical field [0001] The invention belongs to the technical field of semiconductor devices, and in particular relates to an integration method of a graphene metal oxide gate dielectric. Background technique [0002] According to Moore's Law, the integration level of chips doubles every 18 months to 2 years, that is, the processing line width is reduced by half. The development path to extend Moore's Law by utilizing the shrinking size of silicon-based semiconductor materials (the processing limit of silicon materials is generally considered to be 10 nanometer line width) is gradually approaching the end. With the continuous reduction of device size in the field of microelectronics, silicon material is gradually approaching its processing limit. [0003] In order to prolong the life of Moore's Law, the international semiconductor industry has proposed Beyond Silicon technology (Beyond Silicon), among which the most promising graphene came into being. Graphene, as a new ty...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/283
Inventor 张有为仇志军陆冰睿陈国平刘冉
Owner FUDAN UNIV