Low source-drain contact resistance mosfets and manufacturing method thereof

Abstract

The invention discloses a metal-oxide -semiconductor field effect transistor (MOSFET) capable of effectively reducing source drain contact resistance and a manufacturing method of the MOSFET. The MOSFET capable of effectively reducing the source drain contact resistance and the manufacturing method of the MOSFET comprises substrates, a grid stacking structure at the bottom of the substrate, source-drain zones, grate side walls and metal silicide, wherein the source-drain zones are arranged in the substrates of the two sides of the grid stacking structure, the grating side walls are arranged on the substrates of the two sides of the grid stacking structure, and the metal silicide is placed in the source-drain zones of the two sides of the grating side walls. The MOSFET capable of effectively reducing the source drain contact resistance and the manufacturing method of the MOSFET is characterized in that a fractional condensation zone of doping cation is arranged on an interface of the metal silicide the source-drain zones. According to the MOSFET capable of effectively reducing the source drain contact resistance and the manufacturing method of the MOSFET, due to the fact that the fractional condensation zone of doping cation is arranged on the interface of source-drain contact of the metal silicide and the source-drain zones, schottky potential barrier height can be effectively reduced, the source-drain contact resistance is greatly reduced, and property of components is further improved.

Description

technical field [0001] The invention relates to a semiconductor device and a manufacturing method thereof, in particular to a MOSFETS with effectively reduced source-drain contact resistance and a manufacturing method thereof. Background technique [0002] The continuous increase of IC integration requires the continuous reduction of device size, but the electrical operating voltage sometimes remains unchanged, which makes the electric field strength in the actual MOS device continue to increase. The high electric field brings a series of reliability problems, which degrades the performance of the device. For example, parasitic series resistance between the source and drain regions of a MOSFET will cause the equivalent operating voltage to drop. [0003] figure 1 Shown is a MOSFET with metal silicide on the heavily doped source and drain in the prior art, wherein a gate stack structure 200 composed of a gate dielectric layer 210 and a gate electrode 220 is formed on a subs...

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Problems solved by technology

[0016] However, the above three methods have significant limitations

[0017] For the above method 1, due to the limitation of the solid solubility limit of dopants or impurities in silicon, it is impossible to continuously increase the doping concentration N of the source and drain regions, that is, there is a maximum value of N

[0018] For the above method 2, due to the different materials of silicide, it is necessary to make different layouts and deposit different metal materials according to the different types of N and PMOS when making MOS, which greatly increases the complexity of the process and cannot be applied to actual production.

[0019] For the above method 3, it seems that the process is relatively simple only to change the material of the source and drain regions, but the impurities in Si 1-x Ge x The doping concentration in Si is not as high as that in Si, that is, although m* is reduced but N is reduced again, the ρ of the entire device c The reduction effect is not obvious

[0020] It can be seen that in the existing manufacturing technology of doped source-drain MOSFETs, it is difficult to use known methods to effectively reduce the source-drain contact resistance

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