Extension pin Fan-out Panel Level ball grid array (BGA) package part and manufacture process thereof

A manufacturing process and packaging technology, used in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve the problems of reducing package size, reducing packaging cost, shortening current and signal transmission distance, and achieving low warpage. , The effect of improving product reliability, shortening current and signal transmission distance

Active Publication Date: 2013-05-08
HUATIAN TECH XIAN
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] The purpose of the present invention is to overcome the deficiencies of traditional packaging technology, and develop a Fan-out Panel Level BGA package with extended pins and its manufacturing process. The output wiring forms a three-dimensional state, thereby expanding the output pins. It does not use lead frames, PCBs, and metal welding wires, which reduces packaging costs and greatly reduces the packaging size. Copper wiring technology makes the connection more efficient, shortens the current and signal transmission distance, and improves the electrical performance and product reliability

Method used

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  • Extension pin Fan-out Panel Level ball grid array (BGA) package part and manufacture process thereof
  • Extension pin Fan-out Panel Level ball grid array (BGA) package part and manufacture process thereof
  • Extension pin Fan-out Panel Level ball grid array (BGA) package part and manufacture process thereof

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Embodiment Construction

[0027] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0028] As shown in the figure, a Fan-out Panel Level BGA package with extended pins is mainly composed of chip 1, plastic compound 2, insulating layer 3, metal copper 4, nickel palladium gold 5, solder ball 6, pad 8, The second insulating layer 9 , the secondary metal copper wiring 12 , and the third insulating layer 13 are composed. The chip 1 is bonded to the double-sided adhesive film 7 by flip-chip bonding, wherein the other side of the double-sided adhesive film 7 is bonded to the high-temperature-resistant glass 11, and the chip 1 is then plastic-sealed with a plastic sealing compound 2, Then manually tear off the double-sided adhesive film 7 together with the high-temperature-resistant glass 11, and then turn the plastic-encapsulated chip 180 degrees as a whole, so that the chip 1 is facing upwards, and lay an insulating layer 3 on the plastic-encapsul...

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Abstract

The invention discloses an extension pin Fan-out Panel Level ball grid array (BGA) package part and manufacture process thereof. The package part is mainly composed of a chip, a plastic package material, an insulation layer, metal copper, nickel porpezite, a solder ball, a soldering disk, a second insulation layer, a reversely-bonded chip, secondary metal copper distribution wires and a third insulation layer. The manufacture process comprises the following steps of thinning a wafer, scratching a wafer, reversely bonding a chip, plastically packing, tearing a film, turning, carrying out primary insulation treatment, punching holes first time, distributing copper wires first time, carrying out secondary insulation treatment, punching holes second time, distributing copper wires second time, carrying out third insulation treatment, punching holes third time, plating nickel porpezite, printing, reflow soldering and cutting. The manufacture process solve the wire cross problem, saves cost and improve electric performance and reliability of products.

Description

technical field [0001] The invention relates to a Fan-out Panel Level BGA package with extended pins and a manufacturing process thereof, belonging to the technical field of semiconductor packaging. Background technique [0002] With the continuous development of technology, electronic packaging must not only provide chip protection, but also meet the increasing requirements of performance, reliability, heat dissipation, power distribution, etc. at a certain cost. The increase in the speed and processing capacity of functional chips requires more Higher pin count, faster clock frequency and better power distribution. The market needs electronic products to have more functions, longer battery life and smaller geometric size, adapt to lead-free soldering (protect the environment) and effectively reduce costs. [0003] The traditional QFN packaging technology requires the use of lead frames and bonding wires. To a certain extent, not only the packaging cost is high, but also t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/488H01L23/31H01L21/50H01L21/60
CPCH01L24/19H01L24/96H01L2224/0401H01L2224/04105H01L2224/12105H01L2224/19H01L2924/3511H01L2924/00H01L2924/00012
Inventor 朱文辉谌世广王虎刘卫东谢天禹
Owner HUATIAN TECH XIAN
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