Method for manufacturing lateral wall of semiconductor device

Abstract

The invention discloses a method for manufacturing a lateral wall of a semiconductor device. A first dielectric film and a second dielectric film are sequentially deposited on a grid electrode, the film-forming thickness after the second dielectric film is deposited is measured, the standard thickness is subtracted from the film-forming thickness, and a thickness adjustment value is obtained. Main etching and over etching are carried out on the second dielectric film, adjusting etching is carried out on the second dielectric film, and the lateral wall with the width meeting standards is obtained. A chemical etching step capable of adjusting the thickness of the lateral wall is added in a traditional lateral wall etching process, reverse amendment is carried out on lateral wall thickness excursions caused by a dielectric film deposition process in the front stage, therefore, the width of the lateral wall finally meets product specifications, and electrical properties and yield stability of products are also improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a sidewall manufacturing method capable of automatically correcting adverse effects caused by thickness deviations of dielectric film deposition. Background technique [0002] In a typical semiconductor device manufacturing process, after the lightly doped drain (LDD) implant process, it is necessary to make a dielectric spacer (Spacer) to surround the polysilicon gate to prevent a larger amount of source and drain implantation from being too close to the channel to avoid possible Source-drain punchthrough occurs. [0003] The sidewall mainly refers to a self-aligned insulating structure grown around the gate oxide to protect the gate oxide, reduce leakage current, and reduce hot carrier effects. The sidewall etching process is to etch back the film deposited on the wafer surface by plasma etching technology, so as to form a certain thickness of sidewall protection on ...

AI Technical Summary

Problems solved by technology

[0006] 1. Continue to tape out, resulting in a change in the width of the sidewall after etching, resulting in instability in the electrical characteristic parameters of the product;

[0007] 2. If the electrical characteristics of the product exceed the specifications, it must be discarded, resulting in an increase in the waste rate of the production line and economic losses

However, this patent cannot perform real-time and accurate control and adjustment of the sidewall width, and cannot implement the function of automatically correcting the influence of gate line width offset