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Trench Gate Power Field Effect Transistor with Insulated Buried Layer

A power field effect and transistor technology, applied in semiconductor devices, electrical components, circuits, etc., to achieve high doping concentration, reduce surface electric field, and increase breakdown voltage

Active Publication Date: 2016-08-17
SHANGHAI SIMGUI TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Traditional high-voltage devices have a silicon limit problem, that is, the specific on-resistance is proportional to the 2.5th power of the breakdown voltage

Method used

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  • Trench Gate Power Field Effect Transistor with Insulated Buried Layer
  • Trench Gate Power Field Effect Transistor with Insulated Buried Layer

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Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0014] The specific implementation of a trench gate power field effect transistor with an insulating buried layer provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0015] attached figure 1 Shown is a schematic structural view of the transistor according to a specific embodiment of the present invention, including a source layer 20 , a drain layer 30 , a doped well layer 40 , and a gate 50 in a substrate 10 .

[0016] Continue to refer to the attached figure 1 , the source layer 20 is disposed on the first surface of the substrate 10 , and the drain layer 30 is disposed on the second surface of the substrate 10 opposite to the first surface. The doped well layer 40 is disposed between the source layer 20 and the drain layer 30 and bonded to the source layer 20 and the drain layer 30 . In this specific embodiment, the conductivity type of the source layer 20 and the drain layer 30 is N type, and the conductivity ...

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PUM

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Abstract

The invention provides a trench gate power field-effect transistor with an insulated buried layer. The trench gate power field-effect transistor with the insulated buried layer comprises a source layer, a drain layer, a doped well layer, a grid and an auxiliary depletion layer, wherein the source layer is arranged on a first surface of a substrate and the drain layer is arranged on a second surface opposite to the first surface of the substrate; the doped well layer is arranged between the source layer and the drain layer and is fit with the source layer and the drain layer, the source layer and the drain layer are of a first conductive type and the doped well layer is of a second conductive type; the first surface of the substrate is further provided with a first trench, a gate dielectric layer is filled in the first trench, a second trench is further arranged in the gate dielectric layer and the grid is arranged in the trench; the auxiliary depletion layer is arranged at a boundary of the gate dielectric layer and the drain layer on the bottom surface of the first trench, is not overlapped with the grid in a direction perpendicular to the surface of the substrate, and is of the second conductive type.

Description

technical field [0001] The invention relates to the field of semiconductor devices, in particular to a trench gate power field effect transistor. Background technique [0002] Silicon on insulator (SOI), as an ideal dielectric isolation material, can effectively realize the isolation between high and low power modules, as well as high and low voltage devices, completely eliminate electrical interference, simplify the structural design of devices, and SOI isolation The area area is smaller than the junction isolation, which greatly saves the die area, reduces the parasitic capacitance, and can easily integrate different circuits and devices. Therefore, the application of SOI technology to high-voltage devices and power integrated circuits has obvious advantages and broad application prospects. [0003] Traditional high-voltage devices have a silicon limit problem, that is, the specific on-resistance is proportional to the 2.5th power of the breakdown voltage. The Super Junc...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/06
CPCH01L29/0623H01L29/7827
Inventor 魏星徐大伟狄增峰方子韦
Owner SHANGHAI SIMGUI TECH