Fuse reading circuit with power-on self-reset

A technology of reading circuit and self-resetting, applied in read-only memory, information storage, static memory, etc., can solve the problems of system power consumption, bias circuit current consumption, power consumption, etc., and achieve system current saving and simple circuit structure Effect

Active Publication Date: 2016-09-14
NO 24 RES INST OF CETC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this case, the reading circuit has no working current, but the designed bias circuit needs to consume current when it is working.
Moreover, the existing conventional fuse reading circuit needs to design an additional bias circuit to provide a bias voltage for the normal operation of the reading circuit.
[0004] There are some improved fuse reading circuit technologies, such as document 1: Chinese patent, 200780003644.4, electrical programmable fuse bit, although the reading circuit is simple, but the reading circuit needs an external input control bit to control the reading, which requires Certain timing requirements require an additional control circuit to control, and there is a certain power consumption during operation
Such as document 2: US Patent, US7031209B2, METHODS AND CIRCUITS FOR TESTING PROGRAMMABLILITY OF ASEMICONDUCTOR MEMORY CELL AND MEMORY ARRAY USING A BREAKDOWNPHENOMENON IN AN ULTRA-THIN DIELECTRIC, which is characterized by accurate judgment of the fuse state, but its comparator and The reference voltage circuit of the comparator will consume additional system power

Method used

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  • Fuse reading circuit with power-on self-reset
  • Fuse reading circuit with power-on self-reset
  • Fuse reading circuit with power-on self-reset

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Embodiment Construction

[0017] The specific implementation manners of the present invention are not limited to the following description, and are now further described in conjunction with the accompanying drawings.

[0018] The specific implementation of the power-on self-resetting fuse reading circuit of the present invention is as follows: figure 2 As shown, the input port of the present invention V in Connect to fuse unit output port F out .

[0019] The electrical principle diagram of the present invention is as image 3 shown. It contains: the first P-type MOS (metal oxide semiconductor) tube P 1 , the first N-type MOS transistor N 1 , the first inverter Q 1 , the second NAND gate Q 2 , the third inverter Q 3 , the fourth inverter Q 4 , the fifth inverter Q 5 , the second N-type MOS transistor N 2 , the third N-type MOS transistor N 3 , the fourth N-type MOS transistor N 4 , the fifth N-type MOS transistor N 5 .

[0020] image 3 The specific connection in is the same as the con...

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PUM

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Abstract

The invention relates to a power-on self-resetting fuse wire reading circuit. When the circuit is at a power-on moment, a resetting fuse wire unit is on a logic low level, and the reset low level is latched by utilizing a feedback loop. If the fuse wire is not fused, the reset low level is raised at an output end of the fuse wire and is changed into a logic high level, and the high level is latched through the feedback loop; and if the fuse wire is fused, the output end of the fuse wire is always kept in the logic low level at the resetting moment. The power-on self-resetting fuse wire reading circuit does not consume current during normal operation, is simple in structure and is not provided with a biasing circuit.

Description

technical field [0001] The invention relates to a one-time programmable fuse reading circuit, in particular to a power-on self-resetting fuse reading circuit. It is directly applied to the field of one-time programmable memory cells. Background technique [0002] Through a one-time programmed fuse cell, the stored data can be retained in the event of loss of power, a feature called non-volatility. In today's high-precision analog circuits, in order to compensate for the circuit performance deviation caused by process fluctuations, it is necessary to perform single-chip data configuration on the finished integrated circuit to achieve the best performance. The fuse unit and the antifuse unit solve the storage problem of configuration data very well. [0003] Existing fuse reading techniques such as figure 1 As shown, the conventional fuse reading circuit is to utilize two series-connected metal-oxide-semiconductor M 1 and M 2 The bias is in the linear region, forming a la...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C17/18G11C17/16
Inventor 徐鸣远李梁陈光炳付东兵王育新黄兴发沈晓峰陈玺
Owner NO 24 RES INST OF CETC
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