High-speed multiplexer synchronous serial interface design method for ping-pong anti-collision

Abstract

The invention relates to a high-speed multiplexer synchronous serial interface design method for ping-pong anti-collision. The design method comprises the following steps: determining the number of transmitting bytes of the high-speed multiplexer synchronous serial communication interface; receiving an external gate signal through the high-speed multiplexer synchronous serial communication interface, adjusting the phase relation of an input gate and a code element clock, and correcting the adjusted gate; carrying out the anti-collision processing according to the relative delay of the access of the corrected gate and the external processor, and adjusting the data transmission time; reading a state register of the high-speed multiplexer through the processor, carrying out the collision control on ping-pong bus access so as to realize the control switch of a ping-pong buffering area; converting the data in the ping-pong data buffering area to serial data under the control of the processor when the corrected gate is valid, and outputting the serial data to a data line of the high-speed multiplexer. Through the collision processing method, the reliability and stability of the communication of the synchronous serial interface of the high-speed multiplexer can be improved.

Description

technical field [0001] The invention relates to a high-speed multiplexer synchronous serial interface design method for ping-pong anti-collision, which is suitable for anti-collision processing of the high-speed multiplexer synchronous serial interface, and belongs to the field of serial interface communication counting. Background technique [0002] The control computer acquires multiple different or identical camera images, sensor data, actuator status and control parameters, telemetry data, and time codes. These information range from low to high rates, and need to use limited physical channels. Efficient downward transfer. The communication structure that completes efficient transmission is the high-speed multiplexer. Its transmission bandwidth and rate are very high. It can combine multiple narrow bandwidth and low-speed signals into one high-speed signal for transmission at the receiving end. Restore the signal information of each channel through tapping. Due to the ...

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Problems solved by technology

Since the arrival time of the wave gate is synchronous with the access of the processor, the serial port controller is an asynchronous operation. During the communication process of the high-speed multiplexer, there is a potential timing conflict caused by relative phase drift between the read and write time of the processor and the arrival time of the rising edge of the wave gate. risk

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