Manufacturing method of odd-numbered layer substrate and odd-numbered layer substrate

A manufacturing method and technology of odd-numbered layers, applied in the field of microelectronics, to achieve the effects of reducing thickness, realizing no-hole electroplating, and reducing aspect ratio

Active Publication Date: 2017-10-27
NAT CENT FOR ADVANCED PACKAGING
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In view of this, embodiments of the present invention provide a method for manufacturing odd-numbered-layer substrates and odd-numbered-layer substrates to solve the problem of warping-free odd-numbered-layer substrates

Method used

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  • Manufacturing method of odd-numbered layer substrate and odd-numbered layer substrate
  • Manufacturing method of odd-numbered layer substrate and odd-numbered layer substrate
  • Manufacturing method of odd-numbered layer substrate and odd-numbered layer substrate

Examples

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Embodiment 1

[0051] figure 1 It is a flow chart of a method for manufacturing an odd-numbered-layer substrate provided in Embodiment 1 of the present invention. The method includes steps S101 to S106. It should be noted that the steps in this embodiment are named after steps S101 to S106 for convenience only. The steps are distinguished, but the order of the steps is not limited. In different embodiments of the present invention, the order of the steps can be adjusted according to the adjustment of the process.

[0052] Step S101 , low-temperature pressure-bonding of the first copper foil and the second copper foil on both sides of the first prepreg.

[0053] Step S102 , protecting the first copper foil, and performing photolithography on the second copper foil to form first copper lines and copper electrodes.

[0054] In this embodiment, the first copper line and the copper electrode can be interconnected according to the needs of circuit design, and blind holes can be drilled on the cop...

Embodiment 2

[0068] figure 2 It is a flow chart of a method for manufacturing an odd-numbered-layer substrate provided in Embodiment 2 of the present invention, Figures 3A-3J It is a schematic structural cross-sectional diagram corresponding to each step of an odd-numbered-layer substrate manufacturing method provided by Embodiment 2 of the present invention. This embodiment is based on the above-mentioned embodiment, and adopts a semi-additive method when manufacturing the second copper circuit. The method includes step S201 to step S211. It should be noted that, in this embodiment, the steps are named from step S201 to step S211 only for the convenience of distinguishing the steps, rather than limiting the order of the steps. In different implementations of the present invention In the example, the sequence of each step can be adjusted according to the adjustment of the process. The following will combine Figure 3A to Figure 3J Each step from S201 to S211 will be described according...

Embodiment 3

[0102] Figure 4 It is a flowchart of a method for manufacturing an odd-numbered-layer substrate provided in Embodiment 3 of the present invention, Figures 5A-5B It is a schematic structural cross-sectional diagram corresponding to each step of an odd-numbered-layer substrate manufacturing method provided by Embodiment 3 of the present invention. This embodiment is based on Embodiment 2. The difference from Embodiment 2 is that the three-layer Substrate. In this embodiment, a multi-layer odd-numbered-layer substrate can be manufactured. Specifically, the method for manufacturing the odd-numbered-layer substrate further includes:

[0103] Step S312 , high-temperature pressing and curing the third prepreg and the fourth copper foil respectively on the electroplated copper lines on both sides of the substrate, wherein the thickness of the fourth copper foil is 2 μm.

[0104] see Figure 5A 1. On the basis of the three-layer substrate manufactured in the first embodiment, the t...

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Abstract

The invention discloses a method for manufacturing odd-numbered-layer substrates and odd-numbered-layer substrates, wherein the method for manufacturing odd-numbered-layer substrates includes low-temperature lamination of first copper foil and second copper foil on both sides of a first prepreg, A copper foil is used for protection, and the second copper foil is photolithographically formed to form the first copper circuit and the copper electrode. On the first copper circuit and the copper electrode, high-temperature pressing and curing of the second prepreg and the third copper foil make the first copper circuit Embed the copper electrode between the first prepreg and the second prepreg, laser drill the first copper foil and the first prepreg, the third copper foil and the second prepreg to form blind holes for the copper electrodes, and remove slag from the blind holes Afterwards, the first copper foil and the third copper foil are removed, and an electroless copper plating layer structure and a second copper circuit located thereon are formed on the first prepreg and the second prepreg and in the blind holes. The invention realizes warpage-free fabrication of odd-numbered-layer substrates, avoids the phenomenon of voids in holes, and effectively reduces the thickness of the substrates.

Description

technical field [0001] The invention relates to the technical field of microelectronics, in particular to a method for manufacturing an odd-numbered-layer substrate and the odd-numbered-layer substrate. Background technique [0002] With the development of circuit boards towards light, thin, small and high-density interconnection, in order to load more micro-devices on a limited surface, the application of three-dimensional packaging is born. The chip is packaged in three-dimensional integration, that is, the chip is stacked. To increase the packaging density per unit area. [0003] In the prior art, one method is to use a double-sided Build-up method to produce a coreless substrate, and the conductive through holes of the coreless substrate produced by this method are filled by through-hole electroplating. The advantage is that it can solve the warping problem of the coreless substrate. The disadvantage is that it is easy to form holes in the holes during the electroplatin...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H05K3/46H05K1/02
Inventor 于中尧
Owner NAT CENT FOR ADVANCED PACKAGING
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