Ultralow power consumption differential structure nonvolatile memory compatible with standard CMOS (Complementary Metal-Oxide-Semiconductor Transistor) process

A technology with ultra-low power consumption and differential structure, applied in the field of microelectronics, can solve the problem of high power consumption, achieve the effects of reducing high voltage, shortening time to market, and shortening the erasing cycle

Active Publication Date: 2014-10-22
NAT UNIV OF DEFENSE TECH +1
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  • Abstract
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  • Claims
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Problems solved by technology

[0005] The purpose of the present invention is to provide a non-volatile memory cell structure with an ultra-low power differential structure compatible with standard CMOS technology to solve the above-mentioned deficiencies in the prior art, and its programming and erasing operati

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  • Ultralow power consumption differential structure nonvolatile memory compatible with standard CMOS (Complementary Metal-Oxide-Semiconductor Transistor) process
  • Ultralow power consumption differential structure nonvolatile memory compatible with standard CMOS (Complementary Metal-Oxide-Semiconductor Transistor) process
  • Ultralow power consumption differential structure nonvolatile memory compatible with standard CMOS (Complementary Metal-Oxide-Semiconductor Transistor) process

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Embodiment Construction

[0037] Below, the present invention will be further described in conjunction with the accompanying drawings and specific embodiments.

[0038] refer to Figure 7 , the present invention is made up of exactly the same storage unit, and the storage unit of this example is 16, namely memory capacity is 16 bits, but is not limited to 16 bits, and actual storage capacity can be increased according to demand, and can utilize block storage array to Increase storage capacity. From Figure 7 It can be seen that in each row, the control ports ACP and BCP of all storage units are connected together; all the selection ports Select are connected together; in each column, all the read ports RP are connected together; All the tunneling ports TP are connected together, thus forming the structure of the whole memory.

[0039] refer to figure 1 , each memory cell includes two completely symmetrical modules, module A and module B, and the entire memory cell includes 10 transistors in total, ...

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Abstract

The invention discloses an ultralow power consumption differential structure nonvolatile memory compatible with standard CMOS (Complementary Metal-Oxide-Semiconductor Transistor) process, which aims at solving the problem of the incapability of compatibility with the standard CMOS process. With the adoption of a differential output structure, the area of a storage unit structure is reduced. The ultralow power consumption differential structure nonvolatile memory comprises a plurality of storage units, wherein each storage unit comprises two identical modules; each module comprises a control tube, a tunneling tube, a first reading tube, a second reading unit and five transistors of a selection tube; all the transistors comprise mono-crystal and polycrystal silicon gate structure and gate oxide layers same in thickness; the storage units are compatible with the standard CMOS process. By virtue of the ultralow power consumption differential structure nonvolatile memory compatible with the standard CMOS process, the application cost is reduced; the technique development period is shortened; the ultralow power consumption differential structure nonvolatile memory is good in stability, relatively high in reading speed and high in reliability.

Description

technical field [0001] The invention belongs to the technical field of microelectronics and relates to the storage technology of semiconductor integrated circuits, more specifically, it is an ultra-low power consumption differential structure non-volatile memory compatible with standard CMOS technology. Background technique [0002] Many integrated electronic devices require some amount of non-volatile memory. Usually non-volatile memory is used as an independent memory outside the chip or as a memory in the tag chip, mainly to store some control programs, processing instructions or items related to the chip for a long time without power supply. information and more. [0003] Several types of non-volatile memory commonly used at present mainly include erasable programmable read-only memory EPROM, electrically erasable programmable read-only memory EEPROM and flash memory Flash Memory. In addition, there are ferroelectric memory FeRAM, magnetic random access memory MRAM and...

Claims

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Application Information

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IPC IPC(8): G11C16/04G11C16/06
Inventor 李建成李文晓李聪尚靖王震王宏义谷晓忱郑黎明李浩
Owner NAT UNIV OF DEFENSE TECH
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