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Ultra-low power pseudo-differential structure non-volatile memory compatible with standard cmos process

A non-volatile, ultra-low power consumption technology, applied in the field of microelectronics, can solve the problems of small area, high integration, high power consumption, etc., and achieve the effect of high integration density, high reliability and low high voltage

Active Publication Date: 2017-12-29
NAT UNIV OF DEFENSE TECH +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The purpose of the present invention is to provide a non-volatile memory with an ultra-low power consumption pseudo-differential structure compatible with standard CMOS technology to solve the above-mentioned deficiencies in the prior art. Its programming and erasing operations all use FN tunneling effect to solve the problem The problem of high power consumption; only five transistors are used to form a similar differential structure. Since it is not a completely symmetrical structure, it becomes a pseudo-differential structure with small area and high integration. The output of differential signals increases its reliability and is helpful for the use of differential structures. Sensitive amplifiers for increased read speed

Method used

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  • Ultra-low power pseudo-differential structure non-volatile memory compatible with standard cmos process
  • Ultra-low power pseudo-differential structure non-volatile memory compatible with standard cmos process
  • Ultra-low power pseudo-differential structure non-volatile memory compatible with standard cmos process

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Embodiment Construction

[0028] An ultra-low power consumption non-volatile memory with a pseudo-differential structure compatible with a standard CMOS process will be described in detail below with reference to the accompanying drawings.

[0029] refer to Figure 7 , the present invention is made up of exactly the same storage unit, and the storage unit of this example is 16, namely memory capacity is 16 bits, but is not limited to 16 bits, and actual storage capacity can be increased according to demand, and can utilize block storage array to Increase storage capacity. from Figure 7 It can be seen that in each row, the control ports CG of all memory cells are connected together; all the selection ports SEL are connected together; in each column, all the first read ports RP1 are connected together; all the second read ports Take port RP2 and connect together, thus forming the structure of the whole memory.

[0030] refer to figure 1 , each memory cell includes only 5 transistors, all transistors...

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Abstract

The invention discloses an ultra-low power consumption pseudodifferential structure nonvolatile memory compatible with a standard CMOS (Complementary Metal Oxide Semiconductor) process, solving the problem of high power consumption and shortening the area of a storage unit structure. The ultra-low power consumption pseudodifferential structure nonvolatile memory comprises a plurality of storage cells, wherein each storage cell comprises five transistors of a control tube, a first reading tube, a second reading tube, a first selectron and a second selectron, all the transistors are all of a single-polysilicon gate structure and are gate oxide layers with the same thicknesses, and the storage cells are compatible with a standard CMOS process. According to the ultra-low power consumption pseudodifferential structure nonvolatile memory, an FN (Fowler-Nordheim) tunneling effect is utilized for programming and erasing operations, and the problem of high power consumption is solved; only the five transistors are utilized to form a similar-differential structure, thus the ultra-low power consumption pseudodifferential structure nonvolatile memory is high in integration degree and small in area, enhances the reliability, and increases the reading speed.

Description

technical field [0001] The invention belongs to the technical field of microelectronics and relates to a storage technology of a semiconductor integrated circuit, more specifically, an ultra-low power consumption pseudo-differential structure nonvolatile memory compatible with a standard CMOS process. Background technique [0002] Many integrated electronic devices require some amount of non-volatile memory. Usually non-volatile memory is used as an independent memory outside the chip or as a memory in the tag chip, mainly to store some control programs, processing instructions or items related to the chip for a long time without power supply. information and more. [0003] Several types of non-volatile memory commonly used at present mainly include erasable programmable read-only memory EPROM, electrically erasable programmable read-only memory EEPROM and flash memory Flash Memory. In addition, there are ferroelectric memory FeRAM, magnetic random access memory MRAM and p...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/26G11C16/10G11C16/16
Inventor 李建成李文晓李聪尚靖王震谷晓忱郑黎明曾祥华李浩
Owner NAT UNIV OF DEFENSE TECH
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