Method for forming semiconductor structure

Abstract

A method for forming a semiconductor structure comprises the steps of providing a substrate with the surface provided with a fin part; forming a first pseudo gate layer on the substrate and the surface of the pin part, enabling the surface of the first pseudo gate layer to be higher than the top surface of the fin part; flattening the first pseudo gate layer until the top surface of the fin part is exposed; after a flattening process, forming a second pseudo gate layer on the first pseudo gate layer and the surface of the fin part; etching part of the first pseudo gate layer and the second pseudo gate layer until the top and the side wall surface of the fin part are exposed, and forming a pseudo gate striding over a side wall and the top surface of the fin part. In the formed semiconductor structure, uniformity and accuracy of the thickness of the gate structure on the top surface of the fin part are improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a semiconductor structure. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher element density and higher integration. As the most basic semiconductor device, transistors are currently being widely used. Therefore, with the increase of component density and integration of semiconductor devices, the gate size of planar transistors is getting shorter and shorter. The ability of traditional planar transistors to control channel current Weakened, resulting in short channel effect, resulting in leakage current, and ultimately affecting the electrical performance of semiconductor devices. [0003] In order to overcome the short channel effect of the transistor and suppress the leakage current, the prior art proposes a fin field effect transistor ...

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Problems solved by technology

[0005] However, in the prior art, when a fin field effect transistor with a high-K metal gate structure is formed by a post-gate process, the thickness of the gate structure on the top surface of several fins on the same semiconductor substrate is not uniform, and the gate structure It is difficult to control the thickness of the fin field effect transistor, which makes the electrical properties of several fin field effect transistors formed inconsistent, which makes it difficult to control the performance of the formed semiconductor device

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