Preparation method for flash memory

Abstract

The invention provides a preparation method for a flash memory. A groove disposed at an isolation structure between floating gates by use of wet etching twice and combination with a dry etching method in the middle. Compared to a conventional mode of adopting a pure wet etching method, a silicon oxide barrier layer for protecting the floating gates is formed before the added drying etching, and therefore, when the dying etching of anisotropy etching is performed, under the condition that it is ensured that the floating gates are not damaged, the groove whose cross section is an inverted trapezoid, at the time when the shortest distance between an active region and a control gate is increased, the consistency of the distance is ensured, the capacitance area between the control gate and the floating gate of the flash memory is increased, the gate coupling coefficient is improved, the rated leakage currents of the memory are enhanced, and accordingly, the erasing speed of the flash memory and the device reliability during cycling operation are improved; and when the isolation structure and the silicon oxide barrier layer are both made of silicon oxide, after the dry etching, what is needed is only to carry out etching by use of the same solution, the process steps are reduced, and the cost is decreased.

Description

technical field [0001] The invention belongs to the manufacturing field of semiconductor devices, and relates to a preparation method of a flash memory. Background technique [0002] Flash memory (Flash Memory, referred to as flash memory) is a fast-growing non-volatile semiconductor memory. It not only has the advantages of fast reading speed and large storage capacity of semiconductor memory, but also overcomes the loss of power when the power is cut off like DRAM and SRAM. Defects in stored data. It can be rewritten like EPROM and EEPROM, and it is easier to rewrite than them and the price is relatively cheap. Since it was first introduced by Intel in 1988, flash memory has been used in thousands of products, including mobile devices such as mobile phones, laptops, PDAs and USB flash drives, as well as devices such as network routers and cabin recorders. in industrial products. Compared with computer hard disks, it not only has fast access, but also is small in size, l...

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Problems solved by technology

[0006] Due to the limitations of the existing planarization process, such as the limitation of control precision in the chemical mechanical polishing process (CMP), the consistency of the floating gate height in the preparation of flash memory is reduced, and due to the isotropic characteristics of wet etching, The depth of the groove formed by pure wet etching of the shallow trench isolation structure between floating gates in the prior art is consistent, so that the channel corner of the active region of each storage unit in the flash memory reaches the bottom of the groove (also That is, the shortest distance L of the control grid) (such as figure 1 As shown) are not consistent, causing a large number of holes to gather at the corners of the channel to generate an edge coupling effect (edge ​​coupling effect) to form a high electric field, and because from a design point of view, the memory cell leakage current limit (cell drain current margin) becomes a limiting Fowler -Nordheim (FN) is an important factor in erasing speed and reducing memory cell channel characteristics (degrading cell channel feature), so that a large number of holes accumulated at the channel corners lead to a reduction in flash memory erasing speed, therefore, reducing flash memory erasing The removal speed is due to the inconsistency of the shortest distance L from the corner of the channel in the active area of ​​each memory cell to the bottom of the groove (that is, the control gate). In addition, it is due to the stress-induced interface damage caused by the negative pressure of the control gate during cycle operation. The impact on channel characteristics can even lead to device failure;

[0007] At the same time, the shortest distance L from the corner of the channel in the active region of each memory cell to the bottom of the groove (that is, the control gate) is inconsistent, resulting in a reduction in the capacitance area between the control gate and the floating gate, resulting in a gate coupling coefficient ( gate coupling ratio) decreases. When operating the storage unit, it is necessary to apply a larger voltage to be sufficient. The increase in the operating voltage is likely to cause problems such as heat dissipation and noise, and it will also increase power consumption. These situations affect the stability and reliability of the memory. are very unfavorable

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