Method for forming semiconductor device and method for forming fin field effect transistor

Abstract

The invention provides a method for forming a semiconductor device and a method for forming a fin field effect transistor. According to the method for forming the semiconductor device, the position on the surface of a semiconductor material layer at a device dense area of a semiconductor substrate is higher than the position of a semiconductor material layer at a device sparse area, hence, the semiconductor material layer at the device sparse area is covered with a mask layer, ions are injected to the partial thickness part of the semiconductor material layer at the dense area, so that an ion injection area is formed, and then the ion injection area is removed. After the ions are injected, the characteristic of a semiconductor material in the ion injection area is changed, the character of the ion injection area of the semiconductor material layer differs from the character of a nonionic injection area of the semiconductor material layer, the semiconductor material layer with the nonionic injection area is hardly affected in the subsequent removing process of the ion injection area, accordingly, the heights of the semiconductor material layers at the device sparse area and the device dense area are close to be the same ultimately, and therefore the performance of the semiconductor device is improved.

Description

Technical field [0001] The invention relates to the field of semiconductor formation, in particular to a method for forming a semiconductor device and a method for forming a fin field effect transistor. Background technique [0002] With the rapid development of integrated circuit (IC) manufacturing technology, especially after entering the field of submicron feature size, the size of traditional integrated circuits is shrinking, and the size of semiconductor components must be correspondingly smaller. [0003] However, for example, a MOS transistor generates a switching signal by applying a voltage to the gate and adjusting the current through the channel region. However, when semiconductor technology enters the node below 45 nanometers, the traditional planar MOS transistor has a weaker ability to control the channel current. , Causing serious leakage current. Conventional MOS transistors can no longer meet the requirements for device performance, and multi-gate devices have rec...

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Problems solved by technology

[0008] Currently, in the manufacturing process of FinFET, after the gate material layer 4 undergoes the grinding process, various parts of the surface 41 have large unevenness defects, and the height difference is large. This defect directly affects the subsequent semiconductor device manufacturing process, and affects the final The performance of the formed semiconductor device

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