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Method for forming PMOS transistor and method for forming PMOS transistor

A transistor and semiconductor technology, which is applied to the formation of CMOS transistors and the formation of PMOS transistors, can solve the problems such as the quality of embedded germanium and silicon needs to be improved, and achieves the improvement of carrier mobility, stability and reduction of dislocation defects. Effect

Active Publication Date: 2015-03-18
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The introduction of embedded silicon germanium technology can improve the carrier mobility of transistors to a certain extent, but in practical applications, it is found that in the process of forming transistors, the quality of embedded silicon germanium in transistors needs to be improved

Method used

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  • Method for forming PMOS transistor and method for forming PMOS transistor
  • Method for forming PMOS transistor and method for forming PMOS transistor
  • Method for forming PMOS transistor and method for forming PMOS transistor

Examples

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no. 1 example

[0066] Figure 3 to Figure 8 It is a schematic cross-sectional view of the formation process of the PMOS transistor according to the first embodiment of the present invention.

[0067] Please refer to image 3 , a semiconductor substrate 200 is provided, and a gate structure 210 is formed on the surface of the semiconductor substrate.

[0068] The semiconductor substrate 200 is one of single crystal silicon, polycrystalline silicon, amorphous silicon or silicon on insulator; the semiconductor substrate 200 can also be a silicon substrate, a germanium substrate, a gallium arsenide substrate or a germanium substrate. SiC substrate; the surface of the semiconductor substrate 200 may also be formed with several epitaxial interface layers or strained layers to improve the electrical performance of the PMOS transistor.

[0069] An isolation structure may also be formed in the semiconductor substrate 200 , and the existing isolation structure generally adopts shallow trench isolati...

no. 2 example

[0159] Figure 9 to Figure 15 It is a schematic cross-sectional view of the formation process of the CMOS transistor according to the second embodiment of the present invention.

[0160] Please refer to Figure 9 , provide a semiconductor substrate 300, the semiconductor substrate includes a PMOS region I and an NMOS region II, a first gate structure 310 is formed on the surface of the semiconductor substrate 300 in the PMOS region I, and a first gate structure 310 is formed in the semiconductor substrate in the NMOS region II A second gate structure 320 is formed on the surface of the bottom 300 .

[0161] The positions of the PMOS region I and the NMOS region II may be interchanged.

[0162] In this embodiment, the semiconductor substrate 300 is a silicon substrate made of single crystal silicon material. A shallow trench isolation structure 301 is formed in the semiconductor substrate 300, and the shallow trench isolation structure 301 is filled with silicon oxide.

[0...

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Abstract

Provided are a method for forming a PMOS transistor and a method for forming a PMOS transistor. The method for forming a PMOS transistor comprises the steps of providing a semiconductor substrate with a gate structure formed on the surface, forming grooves in the semiconductor substrate at the two sides of the gate structure, filling the grooves with a stress layer, doping the stress layer with carbon, and annealing the semiconductor substrate. The density and stability of the stress layer are improved, the rate of erosion to the stress layer by wet chemicals in the transistor forming process is reduced, the quality of the stress layer is improved, the carrier mobility of the transistors is improved, and the driving performance of the transistors is improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for forming a PMOS transistor and a method for forming a CMOS transistor. Background technique [0002] With the continuous development of semiconductor technology, carrier mobility enhancement technology has been widely studied and applied. Improving the carrier mobility in the channel region can increase the driving current of MOS devices and improve the performance of the devices. [0003] In the existing manufacturing process of semiconductor devices, since stress can change the energy gap and carrier mobility of silicon materials, it has become an increasingly common means to improve the performance of MOS transistors through stress. Specifically, by properly controlling the stress, the mobility of carriers (electrons in NMOS transistors and holes in PMOS transistors) can be increased, thereby increasing the driving current, thereby greatly improving the p...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L21/8238
CPCH01L21/823814H01L29/66636H01L29/7848
Inventor 何永根
Owner SEMICON MFG INT (SHANGHAI) CORP