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Fine-pitch solder pillar bump interconnection structure and preparation method thereof

A technology of interconnection structure and solder column, applied in semiconductor/solid-state device manufacturing, electrical components, electric solid-state devices, etc., can solve problems such as high cost and difficult application

Inactive Publication Date: 2015-04-08
HUATIAN TECH XIAN
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The problem is that the cost of this technical route is high and it is difficult to apply

Method used

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  • Fine-pitch solder pillar bump interconnection structure and preparation method thereof
  • Fine-pitch solder pillar bump interconnection structure and preparation method thereof
  • Fine-pitch solder pillar bump interconnection structure and preparation method thereof

Examples

Experimental program
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Effect test

Embodiment 1

[0041] Such as Figure 7 As shown, a fine pitch solder pillar bump interconnection structure includes a chip substrate 1, at least one solder pillar bump on the chip substrate 1, and the solder pillar bump includes solder pillar 6, The solder ball 8 and the lower bump metal layer 4, the solder ball 8 is connected to the top of the solder column 6, the lower bump metal layer 4 is connected to the bottom of the solder column 6, the top of the chip substrate 1 is connected with a metal pad 2, and the bump The lower part of the metal layer 4 is connected to the metal pad 2; the melting point of the solder pillar 6 is higher than 200 degrees, the height is greater than 5 microns, the melting point of the solder ball 8 is less than 180 degrees, and the reflow temperature of the solder ball 8 is not higher than 200 degree.

[0042] Wherein, the chip substrate 1 has completed the processing of the metal pad, and the metal pad 2 is the top metal of the silicon wafer.

[0043] The chip sub...

Embodiment 2

[0065] A fine pitch solder column bump interconnection structure. The structure includes a chip substrate 1. There is at least one solder column bump on the top of the chip substrate 1. The solder column bump includes a solder column 6 and a solder ball 8 and the under-bump metal layer 4, the solder ball 8 is connected to the top of the solder post 6, the under-bump metal layer 4 is connected to the bottom of the solder post 6, the top of the chip substrate 1 is connected with the metal pad 2, and the under-bump metal The lower part of the layer 4 is connected to the metal pad 2; the melting point of the solder column 6 is higher than 200 degrees, the height is greater than 5 microns, the melting point of the solder ball 8 is less than 180 degrees, and the reflow temperature of the solder ball 8 is not higher than 200 degrees.

[0066] There is a metal barrier layer between the solder column 6 and the solder ball 8. The barrier layer is made of one or a combination of materials su...

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Abstract

The invention discloses a fine-pitch solder pillar bump interconnection structure and a preparation method thereof, and belongs to the technical field of microelectronic advanced packaging. The structure is characterized in that a solder pillar bump on the surface of a chip comprises a bump lower metal layer, a solder pillar and a solder ball on the top of the solder pillar, wherein the melting point of the solder pillar is higher than that of the solder ball. The method for forming the structure comprises the following steps: sputtering an adhesive layer and a seed layer on a metal bonding pad on the surface of a chip wafer; gluing, exposing and developing to form a bump open pattern; then electroplating the solder pillar to a certain height, filling a low-melting-point solder layer to a certain height by printing solder paste or vacuum liquid-state solder; then removing a thick photoresist layer; refluxing to form the solder pillar bump; etching the bump lower metal layer with the bump as a mask. The formed fine-pitch bump has the characteristic of low melting point and can realize flip-chip reflow at low temperature; meanwhile, since the solder pillar has better plasticity and extensibility than a metal bump pillar, a welding spot structure formed by the flip-chip reflow process has lower stress, the reliability of a Cu low-K chip is favorably improved, and meanwhile great flexibility in the aspect of selection of the bump material is realized.

Description

Technical field [0001] The invention relates to the fields of microelectronic packaging technology, MEMS technology and three-dimensional integration technology, in particular to a wafer-level micro bump preparation technology, in particular to a fine pitch solder pillar bump interconnect structure and a preparation method thereof. Background technique [0002] With the continuous advancement of CMOS technology from 20nm and below nodes, the number of chip I / Os has increased dramatically. The increase in the number of I / Os promotes the continuous development of micro bump technology towards ultra-high density. Flip chips using bump interconnects gradually replace wire bond synthesis as the current mainstream of high-density interconnects. [0003] With the trend toward smaller and higher density requirements for micro bumps, the manufacturing process of bumps is also constantly improving. There are two types of micro bumps commonly used in the industry: solder bumps and copper pi...

Claims

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Application Information

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IPC IPC(8): H01L23/488H01L21/60
CPCH01L2224/11H01L2224/11462H01L2224/1147
Inventor 于大全
Owner HUATIAN TECH XIAN