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Current Multiplexed Low Noise Amplifier

A low-noise amplifier and current multiplexing technology, which is applied in the direction of improving the amplifier to reduce the influence of noise, can solve the problems that the gain and improvement of the low-noise amplifier cannot be realized, achieve low power consumption, realize third-order nonlinearity, and realize linearity enhancement Effect

Active Publication Date: 2019-01-04
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The current multiplexing technology of sharing the DC bias current between the NMOS transistors Min1 and Mo1 can reduce the static power consumption of the low-noise amplifier, but the RF signal sampling capacitive coupling between the input stage and the output stage cannot realize the low-noise amplifier. further increase in gain

Method used

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  • Current Multiplexed Low Noise Amplifier
  • Current Multiplexed Low Noise Amplifier
  • Current Multiplexed Low Noise Amplifier

Examples

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Embodiment Construction

[0033] Such as figure 2 Shown is the structural diagram of the current multiplexing low noise amplifier of the embodiment of the present invention; the current multiplexing low noise amplifier of the embodiment of the present invention includes: a cascaded first-stage amplifying circuit, a second-stage coupling amplifying circuit, and a third-stage amplifying circuit , a first bias circuit, a second bias circuit, and an output circuit.

[0034] The first-stage amplifying circuit is an input-stage amplifying circuit, the third-stage amplifying circuit is an output-stage amplifying circuit, and the second-stage coupling amplifying circuit amplifies the output signal of the output terminal of the first-stage amplifying circuit and couples connected to the input of the third stage amplifier circuit.

[0035]The first-stage amplifying circuit includes a source-degenerate inductance common-source amplifier formed by a first NMOS transistor Min, the source of the first NMOS transis...

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Abstract

The invention discloses a current multiplexing low noise amplifier. The current multiplexing low noise amplifier comprises three amplifying circuits in cascaded connection, corresponding biasing circuits and an output circuit, wherein a first-stage amplifying circuit is taken as an input stage and consists of a source degeneration inductance common-source amplifier; a third-stage amplifying circuit is taken as an output stage and comprises a linear compensating circuit; a second NMOS (N-channel Metal Oxide Semiconductor) tube is taken as a main amplifier; a third NMOS tube is a linear compensating tube; the gates and the drains of the two NMOS tubes are connected in parallel together respectively; the gate-source voltages of the two NMOS tubes are the same and a substrate electrode of the third NMOS tube is connected with a substrate bias voltage, so that the second NMOS tube works in a saturation region while the third NMOS tube works in a sub-threshold region and a third-order trans-conductance coefficient of the output-stage amplifying circuit is decreased or eliminated through the mutual cancelling of a positive third-order trans-conductance coefficient in the sub-threshold region and a negative third-order trans-conductance coefficient in the saturation region. Through adoption of the current multiplexing low noise amplifier, the gain can be increased; the power consumption is lowered; a high noise coefficient is achieved; and the linearity can be enhanced.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit, in particular to a current multiplexing low noise amplifier. Background technique [0002] Such as figure 1 Shown is a structure diagram of an existing current multiplexing low noise amplifier; the existing current multiplexing low noise amplifier includes: a cascaded input-stage amplifying circuit and an output-stage amplifying circuit, and a radio frequency signal coupling circuit between the two-stage amplifying circuits. [0003] The input stage amplifier circuit includes NMOS tube Min1, the source of NMOS tube Min1 is grounded to Gnd through feedback inductor Ls1, the RF input signal Rfin is connected to the gate of NMOS tube Min1 through DC blocking capacitor Cin1 and inductor Lg1, and one end of resistor R101 is connected to the power supply voltage Vdd, the other end of the resistor R101 is connected to the gate of the NMOS transistor Min1 through the inductor Lg1 to bias the gate. ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03F1/26
Inventor 戴若凡
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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