Structure of mask read-only memory with low gate resistance and manufacturing method thereof
A technology of read-only memory and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electric solid-state devices, circuits, etc., can solve the problems of narrow current path and limit the reading current of mask-type read-only memory, and improve the read-only Speed, reduce parasitic resistance, reduce the effect of RC delay
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[0016] In order to have a more specific understanding of the technical content, characteristics and effects of the present invention, now in conjunction with the accompanying drawings, the details are as follows:
[0017] The mask-type read-only memory of low gate resistance of the present invention, its manufacturing process is as follows:
[0018] Step 1, forming a shallow isolation trench (STI) on the active area of the silicon substrate, such as image 3 As shown, to isolate the mask ROM area from the peripheral circuits. Isolation of the reticle ROM area from peripheral circuitry can also be achieved by local oxidation (LOCOS).
[0019] Step 2, perform P well implantation in the active area to form the active area in the P well, such as Figure 4 (Figure B is the top view after this step is completed).
[0020] Step 3, perform implantation of N-type buried source and drain, such as Figure 5 (Figure B is the top view after this step is completed).
[0021] The N-sh...
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