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Structure of mask read-only memory with low gate resistance and manufacturing method thereof

A technology of read-only memory and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electric solid-state devices, circuits, etc., can solve the problems of narrow current path and limit the reading current of mask-type read-only memory, and improve the read-only Speed, reduce parasitic resistance, reduce the effect of RC delay

Inactive Publication Date: 2015-06-10
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At the same time, the gate, source and drain are long strips, and the current path is narrow and long, which greatly limits the read current of the mask-type read-only memory.

Method used

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  • Structure of mask read-only memory with low gate resistance and manufacturing method thereof
  • Structure of mask read-only memory with low gate resistance and manufacturing method thereof
  • Structure of mask read-only memory with low gate resistance and manufacturing method thereof

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Embodiment Construction

[0016] In order to have a more specific understanding of the technical content, characteristics and effects of the present invention, now in conjunction with the accompanying drawings, the details are as follows:

[0017] The mask-type read-only memory of low gate resistance of the present invention, its manufacturing process is as follows:

[0018] Step 1, forming a shallow isolation trench (STI) on the active area of ​​the silicon substrate, such as image 3 As shown, to isolate the mask ROM area from the peripheral circuits. Isolation of the reticle ROM area from peripheral circuitry can also be achieved by local oxidation (LOCOS).

[0019] Step 2, perform P well implantation in the active area to form the active area in the P well, such as Figure 4 (Figure B is the top view after this step is completed).

[0020] Step 3, perform implantation of N-type buried source and drain, such as Figure 5 (Figure B is the top view after this step is completed).

[0021] The N-sh...

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Abstract

The invention discloses a manufacturing method of a mask read-only memory with low gate resistance. The manufacturing method includes the steps of 1, forming a shallow isolation trench in an active area of a silicon substrate by an existing technique, and performing P-well injection and N-type burying source / drain injection to form gate oxide and a polycrystalline silicon gate; 2, depositing a silicon dioxide dielectric layer, performing back etching to form a first isolation sidewall of the polycrystalline silicon gate; 3, re-depositing a silicon dioxide dielectric layer, and performing back etching to remove the silicon dioxide dielectric layer on the polycrystalline silicon gate so as to form a second isolation sidewall on the side of the first isolation sidewall; 4, performing silicon metallization to form metal oxide on the polycrystalline silicon gate. The invention further discloses a structure of the mask read-only memory formed by the manufacturing method. Gate spacing is filled with the dielectric layer to cover the source / drain, the silicon metallization process is made applicable to manufacturing of the mask read-only memory, gate parasitic resistance and circuit RC (resistance-capacitance) delay are decreased, reading speed of a device is increased, and source / drain short circuit never occurs.

Description

technical field [0001] The invention belongs to the field of integrated circuit manufacturing, in particular to the structure of a mask type read-only memory and its manufacturing method. Background technique [0002] Read-Only Memory (Read-Only Memory) is a memory that can only read data. The data of this memory is written at the time of production. In the manufacturing process, the data is burned into the circuit with a special mask (mask), so it is sometimes called "mask ROM" (mask ROM). In fact, it is very similar to the principle of a CD disc, in which the data state is written in the photolithography process of the semiconductor. [0003] The data of this mask-type read-only memory cannot be changed after writing, so the data cannot be lost, and its manufacturing cost is very low. Therefore, in devices that do not require data update, Mask ROM is very widely used use. [0004] However, the technical disadvantages of this mask-type ROM are also very obvious. Such a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/112H01L21/8246H10B20/00
Inventor 刘冬华石晶钱文生
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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