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Manufacturing method of super-high depth-to-width ratio nano-structure arrays based on SOI

A technology of nanostructure and manufacturing method, which is applied in the direction of nanotechnology, microstructure technology, microstructure device, etc., can solve the problems of complex process and high cost, achieve the effect of reducing production cost and solving production problems

Active Publication Date: 2015-07-08
NORTHWESTERN POLYTECHNICAL UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At the same time, this method can realize any change of the nanostructure array, and overcome the disadvantages of complex and high cost in the existing process

Method used

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  • Manufacturing method of super-high depth-to-width ratio nano-structure arrays based on SOI
  • Manufacturing method of super-high depth-to-width ratio nano-structure arrays based on SOI
  • Manufacturing method of super-high depth-to-width ratio nano-structure arrays based on SOI

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Embodiment 1

[0028] Example 1: Ultra-high aspect ratio nanocolumn array manufacturing technology

[0029] 1) Clean the SOI (Silicon-On-Insulator) silicon wafer 1 to remove dust and organic matter on the surface of the silicon wafer. The monocrystalline silicon of the device layer of the SOI silicon wafer is etched away until the silicon dioxide layer 2 of the SOI silicon wafer 1 is exposed, such as figure 1 shown.

[0030] 2) Depositing polysilicon 3 with a thickness of 500 nanometers on the surface of silicon dioxide layer 2 by low-pressure chemical vapor deposition (LPCVD), such as figure 2 shown.

[0031] 3) Apply photoresist 4, the photoresist is BP212, the thickness is 1-3 microns, pre-baking the substrate after uniform coating, vacuum oven, the temperature is 110 ° C, the time is 15 minutes, and then electron beam light Engraving and developing to form a nanostructure array with a pitch of 500 nanometers and a line width of 500 nanometers.

[0032] 4) Using the photoresist 4 as ...

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Abstract

The invention discloses a manufacturing method of super-high depth-to-width ratio nano-structure arrays based on SOI, belongs to the technical field of a micro-electro-mechanical system (MEMS), and particularly relates to preparation technology of super-high depth-to-width ratio nano-structure arrays in MEMS technology. The super-high depth-to-width ratio nano-structure arrays with different array numbers are manufactured through methods of alternating depositing and etching of polysilicon and silicon nitride, and intervals of the super-high depth-to-width ratio nano-structure arrays can be adjusted through changing the thickness of a silica layer. According to the invention, the technological progress is simple and is easy to realize; the production cost is reduced; and the problem of manufacturing the super-high depth-to-width ratio nano-structure arrays in the MEMS technology is solved. Through the method, under a condition that the strength of a structural material is certain, the depth-to-width ratios of the nano-structure arrays can reach the maximum.

Description

technical field [0001] The invention belongs to the field of micro-electromechanical systems (MEMS) technology, and in particular relates to a preparation technology of an ultra-high aspect ratio nanometer array in the MEMS technology. Background technique [0002] Nano-manufacturing is the frontier of international advanced manufacturing technology, and the manufacturing technology of ultra-high aspect ratio nanostructures is an important development direction of nano-manufacturing. With its unique advantages in mechanical and physical properties, ultra-high aspect ratio nanostructures are widely considered to be an important basis for achieving high performance devices, and have shown broad applications in energy storage, cell cultivation, aircraft drag reduction, and ocean signal detection. prospect. However, with the continuous expansion of the application field of nanostructures, the requirements for the aspect ratio of nanostructures are getting higher and higher. Fa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): B81C1/00B82Y40/00
Inventor 马志波苑伟政姜澄宇乔大勇孟海莎
Owner NORTHWESTERN POLYTECHNICAL UNIV