Manufacturing method of super-high depth-to-width ratio nano-structure arrays based on SOI
A technology of nanostructure and manufacturing method, which is applied in the direction of nanotechnology, microstructure technology, microstructure device, etc., can solve the problems of complex process and high cost, achieve the effect of reducing production cost and solving production problems
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[0028] Example 1: Ultra-high aspect ratio nanocolumn array manufacturing technology
[0029] 1) Clean the SOI (Silicon-On-Insulator) silicon wafer 1 to remove dust and organic matter on the surface of the silicon wafer. The monocrystalline silicon of the device layer of the SOI silicon wafer is etched away until the silicon dioxide layer 2 of the SOI silicon wafer 1 is exposed, such as figure 1 shown.
[0030] 2) Depositing polysilicon 3 with a thickness of 500 nanometers on the surface of silicon dioxide layer 2 by low-pressure chemical vapor deposition (LPCVD), such as figure 2 shown.
[0031] 3) Apply photoresist 4, the photoresist is BP212, the thickness is 1-3 microns, pre-baking the substrate after uniform coating, vacuum oven, the temperature is 110 ° C, the time is 15 minutes, and then electron beam light Engraving and developing to form a nanostructure array with a pitch of 500 nanometers and a line width of 500 nanometers.
[0032] 4) Using the photoresist 4 as ...
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