STT-RAM readout circuit based on folding comparator and control method

Abstract

The invention relates to an STT-RAM readout circuit based on a folding comparator and a control method. The readout circuit comprises a folding cascade comparator, and a parallel magnetic tunnel junction, a control logic circuit and a phase inverter which are connected with the folding cascade comparator, wherein the phase inverter is further connected with the a first D trigger and a second D trigger; the clock control input terminals of the first D trigger and the second D trigger are respectively connected with a first clock signal output terminal and a second clock signal output terminal of a first clock output module; the inverted output terminals of the first D trigger and the second D trigger respectively output high-order data and low-order data stored in the parallel magnetic tunnel junction. The readout circuit can effectively improve the readout speed, reduces power consumption, increases the output range and gain, and improves the reliability of the whole readout circuit when the readout circuit is butted with a digital system.

Description

technical field [0001] The invention relates to an STT-RAM reading circuit and a control method based on a folding comparator. Background technique [0002] Traditional Random Access Memory (RAM) such as Dynamic Random Access Memory (DRAM) is relatively inexpensive, but has slower access speeds, poor durability and data can only be stored for a short period of time. Since the data must be refreshed once in a while, this in turn leads to higher power consumption. Static random access memory (SRAM) has the advantages of fast access speed, low power consumption, and non-volatility, but it is expensive and has low integration. [0003] In recent years, the emerging spin transfer torque random access memory (STT-RAM) is expected to become the first choice for future caches due to its high density, low leakage current, non-volatility, ultra-long durability, and fast read and write. product. [0004] This patent is based on a novel tree-type reading circuit scheme, and proposes ...

AI Technical Summary

Problems solved by technology

[0002] Traditional random access memory (RAM) such as dynamic random access memory (DRAM) is relatively inexpensive, but access speed is slow, durability is poor and data can only be stored for a short period of time

Since the data must be refreshed every once in a while, this in turn leads to a large power consumption

Static random access memory (SRAM) has the advantages of fast access speed, low power consumption, non-volatility, etc., but it is expensive and low in integration

Images