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Contact plug, mos, fin field effect transistor, and method of forming same

A technology of contact plugs and contact holes, which is applied in the field of MOS, contact plugs, and fin field effect transistors, can solve the problems of performance degradation of fin field effect transistors, improve performance, improve isolation effect, and reduce damage degree of effect

Active Publication Date: 2018-08-10
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] The problem solved by the present invention is: as the integration level of integrated circuits is getting higher and higher, the source contact plug formed by the method of the prior art will reduce the performance of the subsequently formed fin field effect transistor

Method used

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  • Contact plug, mos, fin field effect transistor, and method of forming same
  • Contact plug, mos, fin field effect transistor, and method of forming same
  • Contact plug, mos, fin field effect transistor, and method of forming same

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Embodiment Construction

[0054] As the integration level of integrated circuits becomes higher and higher, the reason why the performance of the fin field effect transistor formed subsequently is reduced by the source contact plug formed by the method of the prior art is as follows:

[0055] refer to figure 2 and image 3 , the photolithography process has a certain range of precision. For FinFETs, the feature size of the gate structure and the subsequent source contact plugs that need to be formed are very small. Therefore, the process of etching the silicon nitride layer 107 and the silicon oxide layer 105 with a patterned photoresist to form the source contact hole 108 has exceeded the accuracy range of the photolithography process, which will make the formed source contact hole 108 There is a large deviation in position. this will happen image 3 The situation shown: since the sidewall of the aluminum gate structure 106 is made of the same material as the silicon nitride layer 107 and the sil...

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Abstract

The invention discloses a contact plug, a MOS, a fin-type field effect transistor, and a forming method thereof. The forming method of the contact plug comprises a step of providing a semiconductor substrate, a step of forming a gate structure on a semiconductor substrate, a step of forming a side wall around the gate structure and forming a source electrode and a drain electrode in the semiconductor substrate at two sides of the side wall, a step of forming a first dielectric layer on the semiconductor substrate and the gate structure, wherein the upper surface of the first dielectric layer is level with the top of the gate structure, a step of forming a buffer layer on the first dielectric layer, the gate structure and the side wall, a step of forming a stop layer on the buffer, a step of etching at least one contact hole which goes through the stop layer, the buffer layer and the first dielectric layer, exposing the source electrode or drain electrode out of the bottom of the contact hole, and reducing side wall damage in the formation process of the contact hole by the buffer layer, and a step of forming the contact plug in the contact hole. According to the contact plug formed by the method, the performance of a follow-up semiconductor device can be improved.

Description

technical field [0001] The invention relates to the semiconductor field, in particular to a contact plug, a MOS, a fin field effect transistor, and a forming method thereof. Background technique [0002] As we all know, transistors are key components in integrated circuits. In order to increase the operating speed of the transistor, it is necessary to increase the driving current of the transistor. And because the drive current of the transistor is proportional to the gate width of the transistor, to increase the drive current, the gate width needs to be increased. However, as the integration of integrated circuits becomes higher and higher, the size of the transistor itself is reduced proportionally, and the simple increase of the gate width conflicts with the proportional reduction of the size of the transistor itself, so the fin field effect transistor was developed. (FinFETs). [0003] In prior art, refer to Figure 1 to Figure 4 , the method for forming the source co...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L23/48H01L29/423H01L21/768H01L21/336
Inventor 张城龙何其暘
Owner SEMICON MFG INT (SHANGHAI) CORP