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Formation method of semiconductor structure

A semiconductor and gas technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problems of semiconductor structure electrical properties to be improved, to optimize surface performance, improve flatness, improve surface The effect of flatness

Active Publication Date: 2019-01-22
SEMICON MFG INT (BEIJING) CORP +1
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Problems solved by technology

[0004] However, the electrical performance of the semiconductor structures formed by the prior art needs to be improved

Method used

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  • Formation method of semiconductor structure
  • Formation method of semiconductor structure

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Embodiment Construction

[0035] It can be seen from the background art that the electrical performance of the semiconductor structure formed in the prior art is relatively poor.

[0036] It has been found through research that one of the main reasons for the poor electrical performance of the semiconductor structure is: the electrical performance of the interconnection structure in the semiconductor structure is abnormal (abnormal), and even the problem of bridging (bridge) between adjacent metal layers occurs, so The abnormal electrical properties of the interconnect structure lead to poor electrical properties of the semiconductor structure.

[0037] For further research on the formation method of the semiconductor structure, the formation method of the semiconductor structure includes the following steps: Please refer to figure 1 , provide a substrate 100 with a conductive layer inside the substrate 100; form a dielectric layer 101 on the surface of the substrate; form a photoresist film 103 on the...

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Abstract

A method for forming a semiconductor structure, comprising: providing a substrate; depositing a dielectric layer on the surface of the substrate, the reaction gas of the process of depositing the dielectric layer includes a silicon source gas and an oxygen source gas, and the process duration of depositing the dielectric layer is divided into continuous The first time length, the second time length and the third time length, and the radio frequency power is provided during the process of depositing the dielectric layer, wherein the radio frequency power is the first power in the first time length, and the radio frequency power is increased by the first power in the second time length to the second power, the radio frequency power within the third time period is the second power, and the first power is less than the second power. The invention improves the flatness of the surface of the formed dielectric layer, reduces the probability of protruding defects, thereby improving the electrical performance of the semiconductor structure.

Description

technical field [0001] The invention relates to the technology in the field of semiconductor manufacturing, in particular to a method for forming a semiconductor structure. Background technique [0002] As the production of integrated circuits develops towards ultra-large-scale integrated circuits, the circuit density of integrated circuits is increasing, and the number of semiconductor devices included in integrated circuits is increasing, and the interconnection wires (Interconnect) required to connect semiconductor devices Increase, requiring an increase in silicon area to provide more interconnect layout space. [0003] In order to meet the increasing demand for the number of interconnection lines formed on the silicon chip and to meet the development trend of miniaturization and miniaturization of integrated circuits, the solution proposed in the prior art is a multilayer interconnection structure technology to provide enough for each semiconductor device. interconnect...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768
CPCH01L21/02164H01L21/02211H01L21/02274H01L21/0234H01L21/31144H01L21/76801H01L21/76802H01L21/76826H01L23/53223H01L23/53238H01L23/53266H01L23/53295H01L2924/0002H01L2924/00H01L21/02208H01L21/31111
Inventor 邓浩
Owner SEMICON MFG INT (BEIJING) CORP
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