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Array substrate, display panel and display device

A technology of array substrates and substrates, which is applied in the direction of electrical components, electric solid-state devices, circuits, etc., and can solve problems such as affecting TFT characteristics, display quality degradation, and difficulty in removal

Active Publication Date: 2018-06-15
XIAMEN TIANMA MICRO ELECTRONICS +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Embodiments of the present invention provide an array substrate, a display panel, and a display device, which can solve the problem in the prior art that charges remain in the silicon nitride layer of the interlayer insulating layer and are difficult to remove, thereby affecting TFT characteristics and degrading display quality.

Method used

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  • Array substrate, display panel and display device
  • Array substrate, display panel and display device

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Embodiment 1

[0029] Please refer to figure 2 , figure 2 A partial cross-sectional view of an array substrate 200 provided by an embodiment of the present invention. The array substrate 200 includes a substrate 10, and a buffer layer 11, a semiconductor layer 12, a gate insulating layer 13, a gate electrode 15, an interlayer insulating layer 14, and a source electrode 161 arranged in sequence in a direction perpendicular to the substrate 10. and drain electrode 162 .

[0030] The substrate 10 is mainly made of glass, but it can also be curved transparent plastic, such as polyimide. If curved transparent plastic is used as the material of the substrate 10, polyimide with excellent heat resistance can be used in consideration of the process of performing high-temperature deposition on the substrate 10 (polyimide can withstand high temperatures. ).

[0031] The buffer layer 11 includes a fourth silicon nitride layer and a second silicon oxide layer (not shown in the figure) stacked, and ...

Embodiment 2

[0040] Please refer to Figure 6 , Figure 6 A partial cross-sectional view of another array substrate 300 provided in an embodiment of the present invention. The structure of the array substrate 300 in this embodiment is basically the same as that of the array substrate 200 in Embodiment 1, except that the interlayer insulating layer 14 includes first A silicon nitride layer 141 , a second silicon nitride layer 143 , a first silicon oxide layer 142 and a third silicon nitride layer 144 . The relative dielectric constant of the third silicon nitride layer 144 is greater than or equal to 6.5, which can reduce the damage and charge injection to the underlying interlayer insulating layer caused by the electric field generated during film formation, etching and cleaning.

Embodiment 3

[0042] Please refer to Figure 7 , Figure 7 It is a schematic structural diagram of a display panel 20 provided by an embodiment of the present invention. The display panel 20 includes an array substrate 21 , an opposite substrate 23 opposite to the array substrate 21 , and a liquid crystal layer 22 located between the array substrate 21 and the opposite substrate 23 . Wherein, the array substrate 21 is the array substrate described in the above-mentioned embodiments.

[0043] The display panel provided in this embodiment adopts the array substrates of the above-mentioned embodiments, and the interlayer insulating layer of the array substrate at least includes a first silicon nitride layer, a silicon nitride layer, The second silicon nitride layer and the first silicon oxide layer, and the hydrogen atom percentage content of the first silicon nitride layer is greater than the hydrogen atom percentage content of the second silicon nitride layer, effectively avoiding the firs...

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Abstract

The invention discloses an array substrate, a display panel and a display apparatus. The array substrate comprises a substrate, a gate electrode and a semiconductor layer positioned on the substrate, an inter-layer insulating layer covering the gate electrode and the semiconductor layer, and a source electrode and a drain electrode positioned on the inter-layer insulating layer, wherein the inter-layer insulating layer comprises a first silicon nitride layer, a second silicon nitride layer and a first silicon oxide layer that are arranged in sequence from the bottom up along a direction perpendicular to the substrate; and percent content of hydrogen atoms of the first silicon nitride layer is greater than that of the second silicon nitride layer. A large amount of defects and residual charges in the interface between the first silicon nitride layer and the first silicon oxide layer are avoided, so that the TFT electric performance is improved, and the display quality is improved.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a display panel and a display device. Background technique [0002] Thin Film Transistor (TFT) has been widely used in the field of flat panel display technologies such as liquid crystal display devices and organic light-emitting display devices. Taking active matrix (active matrix) liquid crystal display devices as an example, TFT is used as a liquid crystal display device. Pixel switching elements in liquid crystal display panels. Wherein, the TFT has a gate electrode, a drain electrode, a source electrode and a semiconductor layer, the gate electrode is electrically connected to the gate line and is controlled by it to be turned on, the source electrode is electrically connected to the data line to receive signals, and the drain electrode is electrically connected to the data line The pixel electrodes are electrically connected to change the trans...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/12
CPCH01L27/1248
Inventor 陈伟绩王磊郑焜泰赖大琪
Owner XIAMEN TIANMA MICRO ELECTRONICS
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