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Semiconductor structure and forming method thereof

A technology of semiconductor and stacked structure, which is applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc. It can solve the problems affecting the performance of semiconductor devices, the performance of transistors is different, and the size of nanowires is difficult to be completely uniform, so as to achieve consistent performance and thickness. Uniform, performance-enhancing effects

Active Publication Date: 2016-08-17
SEMICON MFG INT (SHANGHAI) CORP
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AI Technical Summary

Problems solved by technology

[0007] It is difficult for the nanowire size of the fully surrounded gate field effect transistor formed by the existing technology to be completely uniform. Please refer to figure 1 , the size of the nanowire 10 covered by the gate structure 20 of the gate-enclosed transistor at different positions is different, resulting in different performance of the transistor, thereby affecting the performance of the formed semiconductor device
[0008] The performance of the existing fully surrounded gate field effect transistor needs to be further improved

Method used

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  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof

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Embodiment Construction

[0038] As described in the background art, the performance of the existing fully enclosed gate transistors needs to be further improved.

[0039] In an embodiment of the present invention, after forming the first semiconductor wire, a second semiconductor layer is formed on the surface of the first semiconductor wire. The thickness of the second semiconductor layer is uniform. As the channel layer of the fully enclosed gate field effect transistor, compared with directly forming the gate structure on the first semiconductor wire, the first semiconductor wire morphology has a greater impact on the performance of the transistor. The gate structure is formed on the surface of the second semiconductor layer, and the thickness of the second semiconductor layer is uniform, so that the performance of transistors formed at different positions is not affected by the topography of the first semiconductor line.

[0040] In order to make the above-mentioned objects, features and advantages of ...

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Abstract

A semiconductor structure and a method for forming the same, the method for forming the semiconductor structure includes: providing a substrate; sequentially forming a stack structure on the surface of the substrate, the stack structure including several sacrificial layers and several first semiconductor layers, the The surface of the substrate is a sacrificial layer, and the sacrificial layer and the first semiconductor layer are sequentially overlapped; the stacked structure is etched to form a groove on the surface of the substrate, and the first semiconductor line and the sacrificial layer on both sides of the groove line; remove the sacrificial line, so that the first semiconductor line is suspended above the substrate; perform annealing treatment on the first semiconductor line, so that the cross-section of the first semiconductor line is circular; adopt the epitaxial process, in the A second semiconductor layer is formed on the surface of the first semiconductor wire, and the carrier mobility of the second semiconductor layer is greater than that of the first semiconductor nanowire. The method can improve the performance of a gate-all-around field effect transistor formed on the first semiconductor nanowire.

Description

Technical field [0001] The present invention relates to the field of semiconductor technology, in particular to a semiconductor structure and a method of forming the same. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are moving towards higher component density and higher integration. As the most basic semiconductor device, transistors are currently being widely used. Therefore, as the element density and integration of semiconductor devices increase, the gate size of transistors is becoming shorter and shorter. However, the shorter the gate size of the transistor will cause the transistor to produce a short channel effect, which in turn will generate leakage current, and ultimately affect the electrical performance of the semiconductor device. [0003] In order to overcome the short channel effect of the transistor and suppress the leakage current, the prior art proposes a fully enclosed gate field effect...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06H01L21/336
Inventor 禹国宾
Owner SEMICON MFG INT (SHANGHAI) CORP
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