Semiconductor structures and methods of forming them

Abstract

A semiconductor structure and a forming method thereof are provided. The forming method comprises a substrate; a stack structure is formed on the surface of the substrate in order and comprises a plurality of sacrificial layers and a plurality of first semiconductor layers, the surface of the substrate is a sacrificial layer, and the sacrificial layers and the first semiconductor layers are stacked alternately; the stack structure is etched to form a groove in the surface of the substrate and a first semiconductor line and a sacrificial line on two sides of the groove; the sacrificial line is removed so that the first semiconductor line is suspended above the substrate; the first semiconductor line is subjected to annealing processing, so that the cross section of the first semiconductor line is round; an epitaxial technique is used to form a second semiconductor layer of the surface of the first semiconductor line, and the carrier mobility of the second semiconductor layer is greater than that of the first semiconductor nano line. The method can improve the performance of a fully surrounded gate field effect transistor formed on the first semiconductor nano line.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher element density and higher integration. Transistors, as the most basic semiconductor devices, are currently being widely used. Therefore, as the component density and integration of semiconductor devices increase, the gate size of transistors is also getting shorter and shorter. However, the shortening of the gate size of the transistor will cause the short-channel effect of the transistor, thereby generating leakage current, and ultimately affecting the electrical performance of the semiconductor device. [0003] In order to overcome the short channel effect of the transistor and suppress the leakage current, a fully surrounded gate field effect transistor is propose...

AI Technical Summary

Problems solved by technology

[0007] It is difficult for the nanowire size of the fully surrounded gate field effect transistor formed by the existing technology to be completely uniform. Please refer to figure 1 , the size of the nanowire 10 covered by the gate structure 20 of the gate-enclosed transistor at different positions is different, resulting in different performance of the transistor, thereby affecting the performance of the formed semiconductor device

[0008] The performance of the existing fully surrounded gate field effect transistor needs to be further improved

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