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High-electron-mobility transistor device and manufacture method thereof

A technology with high electron mobility and manufacturing methods, applied in semiconductor/solid-state device manufacturing, transistors, semiconductor devices, etc., can solve the problems of easy failure of transistors, difficult heat dissipation, high temperature, etc., and achieve the effect of improving intermodulation distortion

Inactive Publication Date: 2016-08-24
DYNAX SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, for transistors with a single-finger gate width greater than or equal to 100 μm, if the carrier concentration changes monotonously along the gate width direction, then when the transistor is working, the channel at the edge along the gate width direction bears the largest current, its temperature is the highest, and the heat is not easy emits, causing transistors to be more susceptible to failure

Method used

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  • High-electron-mobility transistor device and manufacture method thereof
  • High-electron-mobility transistor device and manufacture method thereof
  • High-electron-mobility transistor device and manufacture method thereof

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no. 1 approach

[0076] ginseng Figure 4G As shown, the high electron mobility transistor device in the first embodiment of the present invention includes a substrate 5, a semiconductor layer 8 formed on the substrate, and a source 6, a drain 1 and a gate formed on the semiconductor layer 8 7.

[0077] Wherein, the substrate 5 may be one or more of sapphire, silicon carbide, silicon, lithium niobate, silicon-on-insulator substrate, gallium nitride or aluminum nitride.

[0078] The semiconductor layer 8 sequentially includes from the direction of the substrate 5:

[0079] Buffer layer 4: not only plays the role of bonding the semiconductor material layer to be grown next, but also protects the substrate 5 from being invaded by some metal ions. In this embodiment, the buffer layer 4 is a gallium nitride layer (Al)GaN with a controllable aluminum content;

[0080] Channel layer 3: the channel layer 3 and the upper barrier layer 2 together form a heterojunction structure, and the channel layer...

no. 2 approach

[0109] ginseng Figure 7E As shown, the high electron mobility transistor device in the second embodiment of the present invention also includes:

[0110] Substrate 5;

[0111] a buffer layer 4 on the substrate;

[0112] a channel layer 3 on the buffer layer;

[0113] a barrier layer 2 located on the channel layer;

[0114] The source 6 , the drain 1 and the gate 7 are located on the barrier layer, and the gate 7 is located between the source 6 and the drain 1 .

[0115] Different from the first embodiment, in this embodiment, there is no groove periodically changing along the gate width direction on the barrier layer 2 (see Figure 4E shown), but the gate region on the barrier layer is implanted with ions, so that the ion implantation dose changes periodically along the gate width direction (see Figure 7D shown).

[0116] Such as Figures 7A to 7E As shown, the manufacturing method in this embodiment includes the following steps:

[0117] S21: First, if Figure 7A A...

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Abstract

The invention discloses a high-electron-mobility transistor device and a manufacture method thereof. The high-electron-mobility transistor device comprises a substrate; a buffer layer arranged on the substrate; a channel layer arranged on the buffer layer and used for providing a carrier moving channel; a barrier layer arranged on the channel layer and used for providing carriers for the channel layer and blocking the carriers in the channel layer from flowing to the barrier layer; and a source electrode, a drain electrode and a grid electrode, which are arranged on the barrier layer, wherein the grid electrode is arranged between the source electrode and the drain electrode. The concentration of the carriers in the channel layer under the grid electrode is not a fixed value along the grid width direction, and is in non-monotone change. Trench etching technique or ion implantation technique are utilized to control the concentration of the carriers in the channel layer under the grid electrode to change as needed, thereby realizing planarization of a transfer transconductance curve, and achieving the purpose of improving linearity of the high-electron-mobility transistor device.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a high electron mobility transistor device and a manufacturing method thereof. Background technique [0002] High electron mobility transistors have become a current research hotspot due to their advantages such as large band gap, high electron saturation drift velocity, high breakdown field strength, and good thermal conductivity. In the field of wireless communication, power amplifiers made of high electron mobility transistors can output higher power and achieve higher efficiency, thereby improving communication range and reducing energy consumption. [0003] At high output power, the transfer function of the high electron mobility transistor becomes nonlinear, and the output power no longer increases with the increase of the input power, which causes intermodulation distortion in the communication system. This is mainly due to the interception of high electron mobilit...

Claims

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Application Information

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IPC IPC(8): H01L29/778H01L29/10H01L21/335
CPCH01L29/778H01L29/1029H01L29/66431
Inventor 尹成功裴轶吴传佳
Owner DYNAX SEMICON
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