Three-gate power LDMOS

Abstract

The invention belongs to the field of power semiconductor devices, and relates to a lateral three-gate power LDMOS based on a bulk silicon technology. The three-gate power LDMOS is mainly characterized by having a three-gate structure and a second conductive material electrically connected with a source or a gate or an external electrode. The three-gate power LDMOS has the main advantages that the three-gate structure increases the channel density and reduces the channel resistance, and thus, the specific on-resistance drops; the second conductive material can freely select the electrode, when the gate electrode is connected, in the positive case, electron accumulation surfaces are formed on the side surface and the bottom surface of a second groove, a multi-dimension low-resistance channel is formed, and the specific on-resistance is greatly reduced, and in the reverse case, assistant depletion of a drift region is carried out, the drift area doping concentration of the device is increased, the specific on-resistance of the device is reduced; when the source electrode is connected, gate-drain overlapping is reduced, the gate-drain capacitance of the device is reduced, and switching loss is reduced; and when the external electrode is electrically connected, multiple effects can be achieved.

Description

technical field [0001] The invention belongs to the field of lateral power semiconductor devices, and more precisely relates to a tri-gate power LDMOS based on bulk silicon technology. Background technique [0002] The key parameters of power LDMOS are withstand voltage and specific on-resistance. Improving the device withstand voltage requires increasing the length of the drift region and reducing its doping concentration, but this will cause the specific on-resistance to be R on,sp ∝BV 2.5 The form increases accordingly, this is the "silicon limit" problem that power LDMOS exists. [0003] In order to reduce the channel resistance, some researchers proposed a trench gate structure (A.Narazaki; Y.Hisamoto; C.Tadokoro; M.Takeda; H.Hagino [A novel 30V p-channel trench gate power MOSFET with ultra lowon-state- resistance at low-gate-voltage Power Semiconductor Devices and IC's], 1997.ISPSD'97.), the structure increases the channel density, broadens the carrier flow path, an...

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Problems solved by technology

However, since the conduction area of ​​the low-resistance channel of ultra-thin SOI is still small, the specific on-resistance needs to be further improved.

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