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S-band receiving-transmitting integrated processor system

A processor system and frequency band technology, applied in the communication field, can solve problems such as poor versatility, low efficiency, and high power consumption, and achieve the effects of low power consumption, high degree of integration, and reduced power

Inactive Publication Date: 2016-10-26
SICHUAN SDRISING INFORMATION TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

S-band signals generally need to be processed by frequency conversion, demodulation, despreading, decoding, etc. Most of the prior art is completed by using a variety of equipment, which not only consumes a lot of power, but also has low efficiency and poor versatility.

Method used

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  • S-band receiving-transmitting integrated processor system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0035] Such as figure 1 and figure 2As shown, an S-band transceiver integrated processor system includes a chassis in which a digital signal processing stand-alone and an analog channel transceiver stand-alone are arranged. The digital signal processing stand-alone includes an FMC data acquisition daughter card and a signal processing motherboard, and the FMC data acquisition The daughter card includes an ADC module and a DAC module. The signal processing motherboard includes FPGA, DSP and ARM. The DSP and FPGA communicate through the DFE interface using the 204A / B communication protocol. The digital signal processing stand-alone external interface uses two micro-rectangular connections The external interface of the analog channel transceiver unit adopts SMA-K type head. The data acquisition daughter card adopts the standard FMC board type (single width), and has one intermediate frequency signal acquisition channel on board, which can realize the sampling of the forward int...

Embodiment 2

[0039] This embodiment is a further improvement made on the basis of the above embodiments, such as figure 1 , figure 2 , Figure 5 and Figure 6 As shown, in this embodiment, the FPGA adopts the XC7K325T-2FBG900IXC7K325T chip of Xilinx Company, which includes 350 HR interfaces and 150 H. This chip includes 16 pairs of GTX high-speed serial interfaces, 500 general-purpose IOP interfaces, and 326,080 logic units. The resources are abundant and meet the signal processing requirements of the present invention. Among the 16 pairs of GTX interfaces of the XC7K325T chip, 8 pairs are used for data interaction of the FMC data acquisition daughter card, 6 pairs are used for optical fiber interfaces, and 2 pairs are used for data interaction with DSP.

[0040] FPGA is externally connected with QDR chip, FLASH chip and RS422 protocol chip. Some common IO pins of FPGA are used as monitoring points to monitor the working status of each internal module and report the working status param...

Embodiment 3

[0044] This embodiment is a further improvement made on the basis of the above embodiments, such as figure 1 , figure 2 image 3 and Figure 4 As shown, in this embodiment, the DSP adopts TI’s 66AK2L06-CMSA2 chip, and the 66AK2L06 chip uses the SGMII method to communicate externally through the PHY chip, which is used for external communication of the digital signal processing stand-alone. This chip has abundant internal resources and needs cooling function Adaptive power technology reduces the power of the 66AK2L06 by 50% compared to similar devices, and TI's development tools and runtime software support make the migration and development of multi-core ARM platforms easier than ever. MCSDK can provide support for open source Linux and TI ARM kernel SYS / BIOSTM operating system. The 66AK2L06 chip has four gigabit network interfaces inside, and uses the SGMII method to communicate externally through the PHY chip, which is used for external communication of a generalized dig...

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PUM

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Abstract

The invention discloses an S-band receiving-transmitting integrated processor system. The S-band receiving-transmitting integrated processor system comprises a chassis, wherein a digital signal processing single machine and an analog channel receiving-transmitting single machine are arranged in the chassis; the digital signal processing single machine comprises an FMC (FPGA Mezzanine Card) data acquisition daughter card and a signal processing mother board; the FMC data acquisition daughter card comprises an ADC (Analog-to-Digital Conversion) module and a DAC (Digital-to-Analog Conversion) module; the signal processing mother board comprises an FPGA (Field Programmable Gate Array), a DSP (Digital Signal Processor) and an ARM (Advanced RISC Machine); the DSP communicates with the FPGA through a DFE interface according to a 204A / B communication protocol; external interfaces of the digital signal processing single machine are two micro rectangular connectors; and an external interface of the analog channel receiving-transmitting single machine is an SMA-K adapter. Through adoption of the S-band receiving-transmitting integrated processor system, down conversion, amplification and filtering of forward S-band signals can be finished integrally; ADC, digital down conversion, dispreading, demodulation and decoding are performed on forward intermediate-frequency signals; backwardly-transmitted data are encoded and modulated; backward intermediate-frequency signals are simulated through DAC output; and up conversion and amplification are performed on backward intermediate-frequency signals, and S-band radio frequency signals are output.

Description

technical field [0001] The invention relates to the field of communication technology, in particular to an S-band transceiver integrated processor system. Background technique [0002] The S-band signal refers to the electromagnetic wave frequency band with a frequency range of 1.55-3.4GHz, which is mainly used in relay, satellite communication, radar and other technical fields. S-band signals generally need to be processed by frequency conversion, demodulation, despreading, and decoding. In the prior art, a variety of devices are used to complete the processing, which not only consumes a lot of power, but also has low efficiency and poor versatility. Contents of the invention [0003] Aiming at the problems existing in the above-mentioned prior art, the present invention makes further improvements on the basis of the prior art. The present invention relates to an S-band transceiver integrated processor system. The present invention can complete digital down-conversion and...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04B1/00
CPCH04B1/0007H04B1/0014
Inventor 肖红何凤义陈龙叶井红
Owner SICHUAN SDRISING INFORMATION TECH
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