Ridge-like LED and method for preparing the same
A ridge-shaped and ridge-shaped technology, applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems of large lattice mismatch, restricting device performance, and high dislocation density of Ge epitaxial layers, and achieves low dislocation density. The effect of improving the luminous efficiency
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Embodiment 1
[0050] See figure 1 , figure 1 A flow chart of a method for preparing a ridge LED provided in an embodiment of the present invention, including:
[0051] (a) select SOI substrate;
[0052] (b) using a CVD process to grow a Ge epitaxial layer on the surface of the SOI substrate;
[0053] (c) using a CVD process to grow an oxide layer on the surface of the Ge epitaxial layer;
[0054] (d) using the LRC process to crystallize the Ge epitaxial layer to form a modified Ge epitaxial layer;
[0055] (e) etching the oxide layer using a dry etching process;
[0056] (f) using a CVD process to grow an intrinsic Ge layer on the surface of the modified Ge epitaxial layer;
[0057] (g) selectively etching the intrinsic Ge layer to form a ridge structure;
[0058] (h) Implanting P ions and B ions respectively on both sides of the ridge structure to form an N-type Ge region and a P-type Ge region;
[0059] (i) Preparation of metal contact electrodes to complete the preparation of the ...
Embodiment 2
[0080] Please refer to Figure 2a-Figure 2m , Figure 2a-Figure 2m It is a schematic diagram of the process flow of another method for preparing a ridge LED according to an embodiment of the present invention, and the method includes the following steps:
[0081] S101. Substrate selection. Such as Figure 2a As shown, the SOI substrate 001 is selected as the initial material;
[0082] S102, Ge epitaxial layer growth.
[0083] S1021, epitaxial growth of the Ge seed layer. Such as Figure 2b As shown, at a temperature of 275° C. to 325° C., a Ge seed layer 002 with a thickness of 40 to 50 nm is epitaxially grown by CVD;
[0084] S1022, growing the Ge main body layer. Such as Figure 2c As shown, at a temperature of 500°C-600°C, a Ge main layer 003 with a thickness of 120-150nm is grown on the surface of the Ge seed layer by using a CVD process;
[0085] S103, preparation of an oxide layer. Such as Figure 2d As shown, SiO with a thickness of 150nm was deposited on the...
Embodiment 3
[0098] Please refer to image 3 , image 3 It is a schematic structural diagram of a ridge LED provided by an embodiment of the present invention. The LED utilizes the above as Figure 2a-Figure 2m prepared as indicated. Specifically, the LED includes: SOI substrate (301), modified Ge epitaxial layer (302), intrinsic Ge layer (303), N-type Ge region (304), P-type Ge region (305), SiO 2 a passivation layer (306) and a metal contact electrode (307);
[0099] Wherein, the modified Ge epitaxial layer is formed through a thermal annealing process after crystallizing the Ge epitaxial layer through an LRC process.
[0100] Preferably, the intrinsic Ge layer has a ridge structure, and the ridge portion of the intrinsic Ge layer has a thickness of 350 nm and a width of 1 μm.
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Abstract
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