Semiconductor structures and methods of forming them

Abstract

The invention provides a semiconductor structure and a forming method thereof. The forming method comprises steps: a base is provided, wherein the base comprises a substrate and a first fin part and an adjacent second fin part located on the substrate; an isolation structure is formed on the substrate, wherein the isolation structure covers the side walls of the first fin part and the second fin part, and the surface of the isolation structure is higher than or flush with the top surfaces of the first fin part and the second fin part; ion implantation is carried out on the isolation structurebetween the first fin part and the second fin part to form an isolation layer; and after the isolation layer is formed, the isolation structure is etched, and thus, the isolation structure exposes thepartial side walls of the fin parts, wherein during the process of etching the isolation structure, the etching rate of the isolation layer is lower than that of the isolation structure. As the etching rate of the isolation layer is lower than that of the isolation structure, etching losses of the isolation layer can be reduced, and the performance of a transistor can be improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] As the integration level of semiconductor devices increases, the critical dimensions of transistors continue to shrink. However, as the size of the transistor decreases sharply, the thickness of the gate dielectric layer and the operating voltage cannot be changed accordingly, which makes it more difficult to suppress the short channel effect and increases the channel leakage current of the transistor. [0003] The gate of the Fin Field-Effect Transistor (FinFET) has a forked 3D structure similar to a fish fin. The channel of the FinFET protrudes from the surface of the substrate to form a fin, and the gate covers the top surface and sidewall of the fin, so that the inversion layer is formed on each side of the channel, and the connection of the circuit can be controlled on ...

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Problems solved by technology

[0005] However, if the surface of the isolation structure at the edge of the fin is lower than the top surface of the fin, after forming the dummy gate structure, it is difficult for the dummy gate structure to fully cover the edge of the fin, so that it is difficult to ensure that the formed source The drain doped region can provide sufficient stress to the channel, which can easily affect the performance of the transistor

[0006] It can be seen that the performance of the semiconductor structure formed by the method for forming the semiconductor structure is relatively poor.

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