Oversampling type Pipeline SAR-ADC system
An oversampling and patterning technology, applied in signal transmission systems, electrical signal transmission systems, analog-to-digital converters, etc., can solve the problems of low sampling rate and low resolution, achieve resolution improvement, high resolution, and easy promotion applied effect
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Embodiment 1
[0033] Such as figure 1 and figure 2 As shown, an oversampling type Pipeline SAR-ADC system includes oversampling switches connected in sequence, an analog-to-digital conversion system and a digital expansion system, wherein the analog-to-digital conversion system includes successive approximation analog-to-digital conversion modules and registers, Wherein, the number of successive approximation analog-to-digital conversion modules is N blocks, where N is a positive integer greater than or equal to 2, and N successive approximation analog-to-digital conversion modules are connected in sequence to form N stages. In this embodiment, the order of each successive approximation analog-to-digital conversion module corresponds to the order of input signals in all successive approximation analog-to-digital conversion modules, and the order of input signals of N-order successive approximation analog-to-digital conversion modules is: first An order successive approximation analog-to-d...
Embodiment 2
[0043] This embodiment makes the following further limitations on the basis of Embodiment 1: the successive approximation analog-to-digital conversion module of this embodiment includes a sampling switch, a capacitor array, a comparator, a logic control module, and an output buffer module, wherein the capacitor array With IN, OUT, G, H, L and C 1-N Pin, the logic control module has IN, OUT, CLK, C 1(1-N) and C 2(1-N) pin. In this embodiment, there are two sampling switches and capacitor arrays, and the two sampling switches are sampling switches SAMP 1 and sampling switch SAMP 2 , the sampling switch SAMP 1 and sampling switch SAMP 2 They are respectively connected to the IN input terminals of the two capacitor arrays in one-to-one correspondence, and the input voltage V ip(t) by the sampling switch SAMP 1 input, input voltage V in(t) by the sampling switch SAMP 2 enter. The OUT output terminals of the two capacitor arrays are respectively connected to the non-invert...
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