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Phytium platform based PCIE link device standby and recovery method

A recovery method and link technology, applied in the direction of program control design, instrumentation, electrical digital data processing, etc., can solve the problems of abnormal retention of the link state of the PCIE link state machine and the standby recovery of the Feiteng platform, and achieve the solution of the link The effect of the abnormal state residency and the realization of the standby recovery function

Active Publication Date: 2018-04-24
KYLIN CORP
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Problems solved by technology

[0015] In view of this, in order to solve the defects and deficiencies in the prior art, this application provides a PCIE link device standby and recovery method based on the Feiteng platform, which can solve the problem of abnormal resident status of the PCIE link state machine, In order to realize the power management standby recovery function of the Phytium platform

Method used

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  • Phytium platform based PCIE link device standby and recovery method

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Embodiment Construction

[0052] The implementation of the present application will be described in detail below with reference to the accompanying drawings and examples, so as to fully understand and implement the implementation process of how the present application uses technical means to solve technical problems and achieve technical effects.

[0053] figure 1 It is a hardware logic structure diagram of the PCIE link device based on the Phytium platform according to the embodiment of the present invention, and it is used to realize the standby and recovery mechanism and method of the PCIE link device. The double solid line in the figure indicates the reset control of the PCIE link device, and the dotted line indicates the power domain and clock domain control.

[0054] The hardware logic structure mainly includes Phytium processor, PCIE bus device, standby control unit, PCIE power domain control logic, PCIE clock domain control logic and standby recovery interrupt source. Wherein, described PCIE b...

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Abstract

The invention discloses a phytium platform based PCIE link device standby and recovery method. The method comprises the steps that an application layer is used for initiation, a system enters a standby process; a standby signal of the PCIE link device is sent to a CPLD complex programmable logic device; a CPU saves the context and enters the waiting interrupt state; after an awakening interrupt isreceived, the system recovery process is started; a recovery signal of the PCIE link device is sent to a CPLD; the PCIE link training process is entered, and link training is performed, and if failed, an error is reported, and exiting is performed; the system performs restorative operations, and then the operation system recovers to normal operation. The method has the advantages that for solvingthe PCIE bus based ARM64 platform standby function problem, the problem that the PCIE link state machine link status is abnormal and resident is solved, and therefore the power management standby recovery function of a phytium platform is achieved.

Description

technical field [0001] The present application belongs to the technical field of power management, and in particular relates to a PCIE link device standby and recovery method based on the Phytium platform. Background technique [0002] The power management standby function can make the system enter a low power consumption state, which can greatly enhance the battery life. At the same time, it has a short wake-up recovery time and requires a special power domain design. It is an indispensable technology in the field of desktop PCs and portable computers. The implementation of the power management standby function of the existing Linux operating system is basically based on the hardware platform of the traditional X86 architecture, or the hardware platform of the ARM64 architecture of the non-PCIE bus. [0003] The domestic Phytium processor platform is mainly designed based on the ARM64 architecture, especially the Phytium 1500A processor, which adopts a system-on-chip (SOC) ...

Claims

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Application Information

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IPC IPC(8): G06F9/44G06F13/12
CPCG06F9/4418G06F13/124G06F2213/0026
Inventor 王琦张铎孙立明刘云熊鑫魏立峰孔金珠吴庆波
Owner KYLIN CORP
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