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Semiconductor chip bonding assembly manufacturing method

A manufacturing method and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device parts, electric solid-state devices, etc., can solve the problem that the inclination angle is not too large, the efficiency of stripping is affected, and the sidewall of the photoresist cannot be disconnected, etc. problem, achieve the effect of reducing difficulty and reducing production cost

Active Publication Date: 2020-01-14
深圳市金誉半导体股份有限公司
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AI Technical Summary

Problems solved by technology

[0005] Although this method can thicken the metal layer on the pad, it still has some obvious defects: after the metal layer grows on the surface of the passivation layer, it is necessary to perform photolithography and etching on the metal layer, which increases the cost. and process complexity
This brings a certain threshold for the popularization and application of the process;
[0008] (2) The photoresist morphology of the stripping process is an inverted trapezoid, but the inclination angle of this inverted trapezoid will not be very large, which may cause the subsequent growth of a thickened metal layer. disconnect
Therefore, the efficiency of stripping is greatly affected, and it is basically impossible to strip smoothly.

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  • Semiconductor chip bonding assembly manufacturing method
  • Semiconductor chip bonding assembly manufacturing method
  • Semiconductor chip bonding assembly manufacturing method

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Embodiment Construction

[0026] The following will clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0027] In order to solve the problem of thickening the bonding block in the prior art, improve the feasibility of the process, and reduce the cost of the process, the present invention provides a method for manufacturing a bonding assembly of a semiconductor chip, mainly by changing the thickness of the passivation layer composite film layer. Combination of materials, during the etching process of the passivation layer, use different etching amounts for different layers in the composite film layer, thereby forming an ...

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Abstract

The invention provides a manufacturing method for a bonding component of a semiconductor chip. The manufacturing method comprises the steps that bonding blocks are formed on the surface of a semiconductor substrate; a passivation layer is formed on the surface of the semiconductor substrate, the bonding blocks are covered with the passivation layer, and the passivation layer is a composite membrane layer comprising multiple passivation material membrane layers; the multiple passivation material membrane layers of the passivation layer are sequentially etched to form inverted trapezoidal openings in the portions, corresponding to the bonding blocks, of the passivation layer; and metal thickening layers are formed on the surfaces of the bonding blocks by means of the inverted trapezoidal openings. According to the scheme, the thickening problem of the bonding blocks can be solved, the process feasibility can be improved, and the process cost can be reduced.

Description

【Technical field】 [0001] The invention relates to the technical field of semiconductor chip manufacturing, in particular to a method for manufacturing a pressure-bonding component of a semiconductor chip. 【Background technique】 [0002] In recent years, gold wire packaging has gradually increased, and packaging factories have begun to shift to copper wire packaging. Copper wire packaging has a series of advantages such as low price, low resistivity, and high thermal conductivity. However, the hardness of the copper wire is higher, and the wire bonding strength is much greater than that of the gold wire and the aluminum wire, and the requirements for the thickness of the metal layer of the pressure soldering block are correspondingly increased. Due to the limitations of photolithography alignment and control of etching line width, it is difficult for chip manufacturers to simply increase the thickness of the metal layer to meet the needs of customers for copper wiring. [0...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/482H01L23/485H01L23/492H01L23/495
CPCH01L23/4824H01L23/485H01L23/492H01L23/49534
Inventor 林河北葛立志覃事治徐衡
Owner 深圳市金誉半导体股份有限公司