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Parallel-arranged SiO2 nanowire and preparation method thereof

A parallel-arranged, nanowire technology, applied in the fields of nanotechnology, nanotechnology, nanotechnology, etc. for materials and surface science, which can solve the problems of unproven performance and application, uncontrollable size, and uneven morphology and other problems, to achieve the effect of low deposition substrate, low cost and simple reaction process

Inactive Publication Date: 2018-06-12
BOHAI UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, for the parallel arrangement of SiO 2 The preparation of nanowires has not been reported yet, and its performance and application have not been well confirmed. The use of thermal evaporation to prepare parallel SiO 2 Nanowire, low cost, novel product structure, has important reference value for the development of nanomaterial preparation field
In addition, there are problems such as poor dispersion, low stability, uncontrollable size, and uneven morphology in the preparation of silicon nanomaterials. 2 The research on the preparation of parallel nanowires is of great significance to the optimization of the preparation process of silicon-based nanomaterials

Method used

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  • Parallel-arranged SiO2 nanowire and preparation method thereof
  • Parallel-arranged SiO2 nanowire and preparation method thereof
  • Parallel-arranged SiO2 nanowire and preparation method thereof

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specific Embodiment approach 1

[0020] Specific embodiment one, a preparation of parallel arrangement of SiO 2 The nanowire method is realized by the following steps.

[0021] Step 1: Pre-treat the base Si wafer, sonicate it with acetone, and clean it with plasma water. Clean the quartz boat with alcohol.

[0022] Step 2. Use SiO nanopowder as the reaction source into one end of the quartz boat, and then place the processed substrate Si wafer in the quartz boat to ensure that it is above the reaction source and does not contact the reaction source. The quartz boat of the source is put into a high-temperature tube furnace filled with Ar protective gas.

[0023] Step 3: Raise the temperature in the furnace to a suitable temperature for the reaction source to react, and keep it for 2 hrs. After the reaction, the temperature in the furnace was lowered to a low temperature. After taking it out, it was found that white flocs had grown on the substrate, which was the parallel arrangement of SiO as described in 1. 2 Nano...

Embodiment 1

[0033] Use 0.5 g SiO nanopowder as the reaction source and put it into the bottom of the quartz boat, use the n-type (111) Si wafer as the substrate and place it in the quartz boat, then place the quartz boat in the quartz chamber of the horizontal tube furnace, adjust the reaction source and The position of the substrate is such that the reaction source is in the high temperature area of ​​the tube furnace and the substrate is in the relatively low temperature area. Before heating, flow 90 ml / min of argon gas into the system to remove air impurities in the reaction system, and then heat the tube furnace to 1150 ºC and keep it for 2 hrs, and wait until the system is in an argon environment. After cooling to room temperature, white flocs were found as nanowires growing on the Si substrate in the area of ​​1130-1140 ºC, see figure 1 with figure 2 , The diameter of the nanowire is 0.3-0.5 microns, and the length is greater than 100 microns. image 3 SiO arranged in parallel 2 EDX ...

Embodiment 2

[0035] Use 0.7g SiO nanopowder as the reaction source and put it into the bottom of a quartz boat, use n-type (111) Si wafer as the substrate and place it in the quartz boat together, then place the quartz boat in the quartz chamber of the horizontal tube furnace to adjust the reaction The positions of the source and the substrate make the reaction source position in the high temperature area of ​​the tube furnace and the substrate in the relatively low temperature area. Before heating, flow 80 ml / min of argon gas into the system to remove air impurities in the reaction system, and then heat the tube furnace to 1140ºC and keep it for 2 hrs, and wait for the system to cool down in an argon environment After reaching room temperature, white flocs were found to grow on the Si substrate at 1120-1130 ºC, and parallel nanowires with a diameter of 0.3-0.5 microns were observed to grow.

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Abstract

The invention provides a preparation method of a parallel-arranged SiO2 nanowire. In the whole process of the method, SiO nanopowder is used as a reaction source, and reacts in a high temperature zoneof a one-dimensional high temperature tubular furnace under a low vacuum environment, and is deposited on a low temperature zone of a silicon wafer substrate along with the circulation of a protective gas. The method has high yield, simple operation, safety and environmental protection, and low cost, has no need to add a catalyst, and can be completed by a chemical reaction at a high temperature.The SiO2 nanowire prepared by the method has a parallel arrangement structure, and the unique novel structure has important academic significance and application for developing new fields of materialproperties.

Description

Technical field [0001] The invention relates to a parallel arrangement of SiO 2 Nanowires and preparation methods thereof belong to the technical field of three-dimensional nanomaterials. Background technique [0002] In recent years, material preparation technology has developed rapidly, especially in the field of nanotechnology. As the frontier of the development of material preparation technology, it has opened up a new world in the field of materials. SiO 2 As a traditional electrical insulating material, it is also the most important basic material in semiconductor technology. Its nanowire preparation technology has important reference value in the application prospects of integrated circuits and solar cells. At the same time, it is used in mesoscopic physics research and nanodevices. It has potential applications, for example, it can be used to make one-dimensional quantum transistors, light-emitting diodes, etc. In addition, as a typical silicon-based nanomaterial, its qu...

Claims

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Application Information

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IPC IPC(8): C01B33/18B82Y30/00B82Y40/00
CPCB82Y30/00B82Y40/00C01B33/18C01P2002/82C01P2002/85C01P2004/03C01P2004/61C01P2004/62
Inventor 杨喜宝吕航王莉丽李波欣陈双龙董恩来赵景龙刘秋颖姚震
Owner BOHAI UNIV
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