Deep silicon etching method based on SOG wafers

Abstract

The invention relates to a deep silicon etching method based on SOG wafers. The method comprises the steps of providing a SOG wafer and placing the SOG wafer on a flat plate; forming a hard mask layeron the silicon structure layer of the SOG wafer; forming a photo-resist layer on the hard mask layer, exposing and developing to expose one part of the hard mask layer; etching the exposed part of the hard mask layer to expose one part of the silicon structure layer; and subjecting the exposed part of the silicon structure layer to deep-induction coupling plasma dry etching in a chamber. The deep-induction coupling plasma dry etching comprises a first etching stage and a second etching stage. The first etching stage comprises a first passivation step, a first pre-etching step and a first etching step, wherein the first passivation step, the first pre-etching step and the first etching step are carried out circularly. The second etching stage comprises a second passivation step, a second pre-etching step and a second etching step, wherein the second passivation step, the second pre-etching step and the second etching step are carried out circularly. The pressure in the first etching step and the pressure in the second etching step are respectively 30 mTorr to 40 mTorr. The etching time and the radio frequency power at the flat plate in the first etching step and the second etchingstep are gradually increased along with the increase of the cycle period.

Description

technical field [0001] The invention relates to the technical field of MEMS manufacturing technology, in particular to a deep silicon etching method based on SOG wafers. Background technique [0002] Micro-electromechanical system sensors are more and more widely used in the fields of automobiles, mobile phones and smart wearable devices, and MEMS technology with bulk silicon technology as the core is developing particularly rapidly. The development of high aspect ratio silicon etching technology has greatly improved the sensitivity of micro sensors and actuators. Compared with surface silicon technology, the bulk silicon technology with deep silicon etching technology as the core can obtain larger detection capacitance and more sensitive The quality block structure improves the resolution and sensitivity of the MEMS sensor. [0003] The bulk silicon process based on the SOG wafer (full name silicon structure layer-glass substrate bonded wafer) is a key process in the proce...

AI Technical Summary

Problems solved by technology

However, there is a problem in the process that the etching rate decreases with the narrowing of the trench width. This phenomenon is also called the lag effect, and sometimes the etching rate in the narrow trench is zero. Therefore, it is difficult to control the etching side. Wall verticality and etch depth

These problems seriously affect the use of high aspect ratio etching technology, and many bulk silicon structures cannot be realized

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