Semiconductor capacitor device and manufacture method thereof

Abstract

The invention provides a semiconductor capacitor device and a manufacture method thereof. The manufacture method includes that a laminated structure comprising a first sacrificial layer, a first support layer, a second sacrificial layer, a second support layer, a third sacrificial layer and a third support layer is adopted for improving the height of the capacitor; the structural strength of the laminated structure during a capacitor hole etching process is improved through two-process settlement for the formation of a lower layer and a higher layer of each of the first sacrificial layer and the second sacrificial layer, wherein the proportion of boron in the upper layer of each sacrifice layer is lower than that in the lower layer of each sacrifice layer and thus the rigidity of the upperlayers is higher than the lower layers. During a process of adopting a chemical mechanical grinding technique for removing a blocking layer, the removal rate of the blocking layer is greater than that of a first conducting layer, so that the first conducting layer is provided with a protruding part protruding from the third support layer. Therefore, the area of a lower electrode of the double-face capacitor is further improved and the integral capacitance value is increased.

Description

technical field [0001] The invention belongs to the field of semiconductor device design and manufacture, and in particular relates to a semiconductor capacitor device and a manufacturing method thereof. Background technique [0002] As one of the necessary components in integrated circuits, capacitors have functions such as voltage adjustment and filtering in circuits, so they are widely used in integrated circuits. For example, capacitors are dynamic random access memory (DRAM), static random access memory (SRAM) and some An essential component of a microprocessor. [0003] Dynamic Random Access Memory (DRAM for short) is a semiconductor storage device commonly used in computers, and is composed of many repeated storage units. Each memory cell generally includes a capacitor 10 and a transistor 11; the gate of the transistor 11 is connected to the word line 13, the drain / source of the transistor 11 is connected to the bit line 12, and the source / drain of the transistor 11 ...

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Problems solved by technology

[0014] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a semiconductor capacitor device a

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